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S29GL064A90TFIR4 Datasheet

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S29GL-A MirrorBit
S29GL064A, S29GL032A, and S29GL016A
64 Megabit, 32 Megabit, and 16 Megabit
3.0-Volt only Page Mode Flash Memory
Featuring 200 nm MirrorBit Process Technology
Data Sheet
This product family has been retired and is not recommended for designs. For new and current designs,
the S29AL016J, S29GL032N, and S29GL064N supersede S29GL016A ,S29GL032A, and S29GL064A
respectively. These are the factory-recommended migration paths. Please refer to the S29AL016J,
S29GL032N, and S29GL064N data sheets for specifications and ordering information. Availability of this
document is retained for reference and historical purposes only.
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume
such that subsequent versions of this document are not expected to change. However, typographical or
specification corrections, or modifications to the valid combinations offered may occur.
Publication Number S29GL-A_00
®
Flash Family
Revision A
Amendment 12
S29GL-A Cover Sheet
Issue Date May 21, 2008
Specifications of SPANSION S29GL064A90TFIR4
Access Time (max):
90ns
Address Bus:
23/22Bit
Boot Type:
Bottom
Cell Type:
NOR
Density:
64Mb
Interface Type:
Parallel
Lead Free Status / Rohs Status:
Compliant
Mounting:
Surface Mount
Number Of Words:
8M/4M
Operating Supply Voltage (max):
3.6V
Operating Supply Voltage (min):
3V
Operating Supply Voltage (typ):
3/3.3V
Operating Temp Range:
-40C to 85C
Operating Temperature Classification:
Industrial
Package Type:
TSOP
Pin Count:
48
Supply Current:
50mA
Sync/async:
Asynchronous
Word Size:
8/16Bit

Summary of Contents

Page 1

... Notice to Readers: This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid combinations offered may occur ...

Page 2

... The Advance Information designation indicates that Spansion Inc. is developing one or more specific products, but has not committed any design to production. Information presented in a document with this designation is likely to change, and in some cases, development on the product may discontinue. Spansion Inc. therefore places the following conditions upon Advance Information content: “ ...

Page 3

... Publication Number S29GL-A_00 This document states the current technical specifications regarding the Spansion product(s) described herein. Spansion Inc. deems the products to have been in sufficient pro- duction volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or modifications to the valid com- binations offered may occur. ® ...

Page 4

... The Secured Silicon Sector provides a 128-word/256-byte area for code or data that can be permanently protected. Once this sector is protected, no further changes within the sector can occur. Spansion MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted erase ...

Page 5

... RESET#: Hardware Reset Pin 7.7 Output Disable Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 7.8 Autoselect Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 7.9 Sector Group Protection and Unprotection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 7.10 Temporary Sector Group Unprotect 7.11 Secured Silicon Sector Flash Memory Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 7.12 Write Protect (WP 7.13 Hardware Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 8. Common Flash Memory Interface (CFI Command Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9.1 Reading Array Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52 9 ...

Page 6

DQ3: Sector Erase Timer ...

Page 7

Figures Figure 3.1 48-Pin Standard TSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 8

Tables Table 1.1 S29GL064A, S29GL032A, S29GL016A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 9

Product Selector Guide Part Number Speed Option Max. Access Time (ns) Max. CE# Access Time (ns) Max. Page Access Time (ns) Max. OE# Access Time (ns) 2. Block Diagram RY/BY RESET# WE# State Control WP#/ACC ...

Page 10

... Connection Diagrams 3.1 Special Package Handling Instructions Special handling is required for Flash Memory products in molded packages (TSOP and BGA). The package and/or data integrity may be compromised if the package body is exposed to temperatures above 150°C for prolonged periods of time. A15 A14 A13 A12 ...

Page 11

NC on S29GL032A A15 3 A14 4 A13 5 A12 6 A11 7 A10 A19 11 A20 12 WE# 13 RESET# 14 A21 15 WP#/ACC 16 RY/BY# 17 A18 18 A17 ...

Page 12

Notes 1. Ball D8 and Ball F1 are NC on S29GL064A (models R3, R4) and S29GL016A (Models 01, 02, R1, R2). 2. Ball S29GL064A (model R5). 3. Ball S29GL032A and S29GL016A. 4. ...

Page 13

Note MCP-compatible Connection Diagram for cellular handsets only. May 21, 2008 S29GL-A_00_A12 Figure 3.4 56-Ball Fine-Pitch Ball Grid Array 56-Ball Fine-Pitch Ball Grid Array Top View, Balls Facing Down A2 A3 ...

Page 14

Notes 1. Ball S29GL064A (model R5 Ball S29GL032A and S29GL016A. 3. Ball S29GL016A Figure 3.5 48-ball ...

Page 15

Pin Descriptions A21A0 22 Address inputs A20A0 21 Address inputs A19A0 20 Address inputs DQ7DQ0 8 Data inputs/outputs DQ14DQ0 15 Data inputs/outputs DQ15/A-1 DQ15 (Data input/output, word mode), A-1 (LSB Address input, byte mode) CE# Chip Enable input OE# ...

Page 16

Logic SymbolS29GL064A (Models R3, R4) 5.3 Logic SymbolS29GL064A (Model R5) 5.4 Logic SymbolS29GL064A (Models R6, R7 A21A0 DQ15DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# BYTE# RY/BY# 22 A21A0 ...

Page 17

Logic SymbolS29GL032A (Models R1, R2) 5.6 Logic SymbolS29GL032A (Models R3, R4) 5.7 Logic SymbolS29GL032A (Models W3, W4) May 21, 2008 S29GL-A_00_A12 A20A0 DQ15DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# ...

Page 18

Logic SymbolS29GL016A (Models R1, R2) 5.9 Logic SymbolS29GL016A (Models W1, W2 A19A0 DQ15DQ0 CE# (A-1) OE# WE# WP#/ACC RESET# BYTE# RY/BY# 20 A19A0 DQ15DQ0 CE# OE# WE# WP#/ACC ...

Page 19

... S29GL016A Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL016A 10 T Device Number/Description S29GL016A 3.0 Volt-only, 16 Megabit Page-Mode Flash Memory Manufactured on 200 nm MirrorBit Device Speed Number Option 90, 10 S29GL016A 10 ...

Page 20

... Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL032A 90 T Device Number/Description S29GL032A 32 Megabit Page-Mode Flash Memory Manufactured using 200 nm MirrorBit Program, and Erase S29GL032A Valid Combinations Device Speed Number Option ...

Page 21

... S29GL064A Standard Products Standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the following: S29GL064A 90 T Device Number/Description S29GL064A, 64 Megabit Page-Mode Flash Memory Manufactured using 200 nm MirrorBit Program, and Erase Device Speed Number Option S29GL064A ...

Page 22

Device Bus Operations This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is a latch ...

Page 23

Word/Byte Configuration The BYTE# pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE# pin is set at logic 1, the device is in word configuration, DQ0DQ15 are active and controlled ...

Page 24

... DC Characteristics on page 70 7.5 Automatic Sleep Mode The automatic sleep mode minimizes Flash device energy consumption. The device automatically enables this mode when addresses remain stable for t CE#, WE#, and OE# control signals. Standard address access timings provide new data when addresses are changed. While in sleep mode, output data is latched and always available to the system. Refer to ...

Page 25

... Current is reduced for the duration of the RESET# pulse. When RESET# is held at V draws CMOS standby current (I greater. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the Flash memory, enabling the system to read the boot-up firmware from the Flash memory. Refer to the tables in for the timing diagram ...

Page 26

Table 7.3 S29GL016A (Model R2, W2) Bottom Boot Sector Addresses Sector Size (KB/ 8-bit Address Sector A19A12 Kwords) Range SA0 000000000 8/4 000000h001FFFh SA1 000000001 8/4 002000h003FFFh SA2 000000010 8/4 004000h005FFFh SA3 000000011 8/4 006000h007FFFh SA4 000000100 8/4 008000h009FFFh SA5 ...

Page 27

Table 7.4 S29GL032A (Models R1, R2) Sector Addresses Sector Size 8-bit (KB/ Address Sector A20-A15 Kwords) Range SA0 64/32 00000000FFFF SA1 64/32 01000001FFFF SA2 ...

Page 28

Table 7.5 S29GL032A (Model R3, W3) Top Boot Sector Addresses Sector Size 8-bit (KB/ Address Sector A20A12 Kwords) Range SA0 000000xxx 64/32 000000h00FFFFh SA1 000001xxx 64/32 010000h01FFFFh SA2 000010xxx 64/32 020000h02FFFFh SA3 000011xxx 64/32 030000h03FFFFh SA4 000100xxx 64/32 040000h04FFFFh SA5 ...

Page 29

Table 7.6 S29GL032A (Model R4, W4) Bottom Boot Sector Addresses Sector Size 8-bit (KB/ Address Sector A20A12 Kwords) Range SA0 000000000 8/4 000000h001FFFh SA1 000000001 8/4 002000h003FFFh SA2 000000010 8/4 004000h005FFFh SA3 000000011 8/4 006000h007FFFh SA4 000000100 8/4 008000h009FFFh SA5 ...

Page 30

Table 7.7 S29GL064A (Models R1, R2, R8, R9) Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21A15 Kwords) Range SA0 0000000 64/32 00000000FFFF SA1 0000001 64/32 01000001FFFF SA2 0000010 64/32 02000002FFFF SA3 0000011 64/32 03000003FFFF SA4 ...

Page 31

Table 7.7 S29GL064A (Models R1, R2, R8, R9) Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21A15 Kwords) Range SA74 1001010 64/32 4A00004AFFFF SA75 1001011 64/32 4B00004BFFFF SA76 1001100 64/32 4C00004CFFFF SA77 1001101 64/32 4D00004DFFFF SA78 ...

Page 32

Table 7.8 S29GL064A (Model R3) Top Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21A12 Kwords) Range SA0 0000000xxx 64/32 000000h00FFFFh SA1 0000001xxx 64/32 010000h01FFFFh SA2 0000010xxx 64/32 020000h02FFFFh SA3 0000011xxx 64/32 030000h03FFFFh SA4 0000100xxx ...

Page 33

Table 7.8 S29GL064A (Model R3) Top Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21A12 Kwords) Range SA68 1000100xxx 64/32 440000h44FFFFh SA69 1000101xxx 64/32 450000h45FFFFh SA70 1000110xxx 64/32 460000h46FFFFh SA71 1000111xxx 64/32 470000h47FFFFh SA72 1001000xxx ...

Page 34

Table 7.9 S29GL064A (Model R4) Bottom Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21A12 Kwords) Range SA0 0000000000 8/4 000000h001FFFh SA1 0000000001 8/4 002000h003FFFh SA2 0000000010 8/4 004000h005FFFh SA3 0000000011 8/4 006000h007FFFh SA4 0000000100 ...

Page 35

Table 7.9 S29GL064A (Model R4) Bottom Boot Sector Addresses (Sheet Sector Size 8-bit (KB/ Address Sector A21A12 Kwords) Range SA54 0101111xxx 64/32 2F0000h2FFFFFh SA55 0110000xxx 64/32 300000h30FFFFh SA56 0110001xxx 64/32 310000h31FFFFh SA57 0110010xxx 64/32 320000h32FFFFh SA58 0110011xxx ...

Page 36

Table 7.10 S29GL064A (Model R5) Sector Addresses (Sheet Sector A21A15 SA0 0000000 SA1 0000001 SA2 0000010 SA3 0000011 SA4 0000100 SA5 0000101 SA6 0000110 SA7 0000111 SA8 0001000 SA9 0001001 SA10 0001010 SA11 0001011 SA12 0001100 SA13 ...

Page 37

Table 7.10 S29GL064A (Model R5) Sector Addresses (Sheet Sector A21A15 SA42 0101010 SA43 0101011 SA44 0101100 SA45 0101101 SA46 0101110 SA47 0101111 SA48 0110000 SA49 0110001 SA50 0110010 SA51 0110011 SA52 0110100 SA53 0110101 SA54 0110110 SA55 ...

Page 38

Table 7.11 S29GL064A (Models R6, R7) Sector Addresses (Sheet Sector A21A15 SA0 0000000 SA1 0000001 SA2 0000010 SA3 0000011 SA4 0000100 SA5 0000101 SA6 0000110 SA7 0000111 SA8 0001000 SA9 0001001 SA10 0001010 SA11 0001011 SA12 0001100 ...

Page 39

Table 7.11 S29GL064A (Models R6, R7) Sector Addresses (Sheet Sector A21A15 SA42 0101010 SA43 0101011 SA44 0101100 SA45 0101101 SA46 0101110 SA47 0101111 SA48 0110000 SA49 0110001 SA50 0110010 SA51 0110011 SA52 0110100 SA53 0110101 SA54 0110110 ...

Page 40

... To access the autoselect codes in-system, the host system can issue the autoselect command via the command register, as shown in require V . Refer to ID Table 7.12 Autoselect Codes, (High Voltage Method) A22 Description CE# OE# WE# to A15 Manufacturer ID Spansion Products Cycle 1 Cycle Cycle 3 Cycle 1 Cycle Cycle 3 Cycle 1 ...

Page 41

... The device is shipped with all sector groups unprotected. Spansion offers the option of programming and protecting sector groups at its factory prior to shipping the device through Spansion Programming Service. ...

Page 42

Table 7.15 S29GL032A (Models R1, R2) Sector Group Protection/Unprotection Addresses Sector A20A15 SA0 000000 SA1 000001 SA2 000010 SA3 000011 SA4SA7 0001xx SA8SA11 0010xx SA12SA15 0011xx SA16SA19 0100xx Table 7.16 S29GL032A (Model R3, W3) Sector Group Protection/Unprotection Address Table Sector ...

Page 43

Table 7.18 S29GL064A (Models R1, R2, R8, R9) Sector Group Protection/Unprotection Addresses Sector A21A15 SA0 0000000 SA1 0000001 SA2 0000010 SA3 0000011 SA4SA7 00001xx SA8SA11 00010xx SA12SA15 00011xx SA16SA19 00100xx SA20SA23 00101xx SA24SA27 00110xx SA28SA31 00111xx SA32SA35 01000xx SA36SA39 01001xx ...

Page 44

Table 7.20 S29GL064A (Model R4) Bottom Boot Sector Protection/Unprotection Addresses Sector A21A12 SA0 0000000000 SA1 0000000001 SA2 0000000010 SA3 0000000011 SA4 0000000100 SA5 0000000101 SA6 0000000110 SA7 0000000111 0000001XXX, SA8SA10 0000010XXX, 0000011XXX, SA11SA14 00001XXXXX SA15SA18 00010XXXXX SA19SA22 00011XXXXX SA23SA26 00100XXXXX ...

Page 45

Table 7.22 S29GL064A (Models R6, R7) Sector Group Protection/Unprotection Addresses Sector A21A15 SA0SA3 00000 SA4SA7 00001 SA8SA11 00010 SA12SA15 00011 SA16SA19 00100 SA20SA23 00101 SA24SA27 00110 SA28SA31 00111 SA32SA35 01000 SA36SA39 01001 SA40SA43 01010 7.10 Temporary Sector Group Unprotect This ...

Page 46

Figure 7.2 In-System Sector Group Protect/Unprotect Algorithms START PLSCNT 1 RESET Wait 1 μs Temporary Sector No First Write Group Unprotect Cycle 60h? Mode Yes Set up sector group address Sector Group Protect: Write 60h ...

Page 47

... The factory offers the device with the Secured Silicon Sector either customer lockable (standard shipping option) or factory locked (contact a Spansion sales representative for ordering information). The customer- lockable version is shipped with the Secured Silicon Sector unprotected, allowing customers to program the sector after receiving the device ...

Page 48

... ESN at addresses 000000h000007h. Please contact your sales representative for details on ordering ESN Factory Locked devices. Customers may opt to have their code programmed by the factory through the Spansion programming service (Customer Factory Locked). The devices are then shipped from the factory with the Secured Silicon Sector permanently locked ...

Page 49

... Software support can then be device-independent, JEDEC ID-independent, and forward- and backward-compatible for the specified flash device families. Flash vendors can standardize their existing interfaces for long-term compatibility. This device enters the CFI Query mode when the system writes the CFI Query command, 98h, to address 55h, any time the device is ready to read array data ...

Page 50

... Table 8.3 Device Geometry Definition Data N Device Size 2 4Eh 00xxh 0017h 64 Mb, 0016h 32Mb, 0015h 16Mb Flash Device Interface description (refer to CFI publication 100) 50h 000xh 0000h x8-only bus devices 52h 0000h 0001h x16-only bus devices 0002h x8/x16 bus devices ...

Page 51

Addresses (x16) Addresses (x8) 40h 41h 42h 43h 44h 45h 46h 47h 48h 49h 4Ah 4Bh 4Ch 4Dh 4Eh 4Fh 50h May 21, 2008 S29GL-A_00_A12 Table 8.4 Primary Vendor-Specific Extended Query ...

Page 52

Command Definitions Writing specific address and data commands or sequences into the command register initiates device operations. Table 10.2 on page 61 Writing incorrect address and data values or writing them in the improper sequence may place the device ...

Page 53

... Programming is allowed in any sequence of address locations and across sector boundaries. Programming to the same word address multiple times without intervening erases (incremental bit programming) requires a modified programming method. For such application requirements, please contact your local Spansion representative. Word programming is supported for backward compatibility with existing Flash driver software and for occasional writing of individual words ...

Page 54

... Once the specified number of write buffer locations are loaded, the system must then write the Program Buffer to Flash command at the sector address. Any other address and data combination aborts the Write Buffer Programming operation. The device then begins programming. Data polling should be used while monitoring the last address location loaded into the write buffer ...

Page 55

... This flash device is capable of handling multiple write buffer programming operations on the same write buffer address range without intervening erases. For applications requiring incremental bit programming, a modified programming method is required; please contact your local Spansion representative. Any bit in a write buffer address range cannot be programmed from 0 back ...

Page 56

... Sector Address Write first address/data Yes Abort Write to Yes Buffer Operation? No (Note 1) Write next address/data pair Write program buffer to flash sector address Read DQ7 - DQ0 at Last Loaded Address Yes DQ7 Data DQ1 1? DQ5 1? Yes Yes Read DQ7 - DQ0 with ...

Page 57

Note See Table 10.2 on page 61 9.5 Program Suspend/Program Resume Command Sequence The Program Suspend command allows the system to interrupt a programming operation or a Write to Buffer programming operation so that data can be read from any ...

Page 58

Chip Erase Command Sequence Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the ...

Page 59

Sector Erase Command Sequence Sector erase is a six bus cycle operation. The sector erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock cycles are written, and are then followed ...

Page 60

... During an erase operation, this flash device performs multiple internal operations which are invisible to the system. When an erase operation is suspended, any of the internal operations that were not fully completed must be restarted. As such, if this flash device is continually issued suspend/resume commands in rapid succession, erase progress is impeded as a function of the number of suspends. The result is a longer cumulative erase time than without suspends ...

Page 61

... Total number of cycles in command sequence is determined by number of words written to write buffer. Maximum number of cycles in command sequence is 21, including Program Buffer to Flash command. 13. Command sequence resets device for next command after aborted write-to- buffer operation. 14. Unlock Bypass command is required prior to Unlock Bypass Program command ...

Page 62

... Total number of cycles in command sequence is determined by number of bytes written to write buffer. Maximum number of cycles in command sequence is 37, including Program Buffer to Flash command. 5. Command sequence resets device for next command after aborted write-to- buffer operation. 6. System may read and program in non-erasing sectors, or enter autoselect mode, when in Erase Suspend mode ...

Page 63

Write Operation Status The device provides several bits to determine the status of a program or erase operation: DQ2, DQ3, DQ5, DQ6, and DQ7. Table 10.2 on page 68 and DQ6 each offer a method for determining whether a ...

Page 64

Notes Valid address for programming. During a sector erase operation, a valid address is any sector address within the sector being erased. During chip erase, a valid address is any non-protected sector address. 2. DQ7 should be ...

Page 65

DQ6: Toggle Bit I Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete, or whether the device entered the Erase Suspend mode. Toggle Bit I may be read at any ...

Page 66

Note The system should recheck the toggle bit even if DQ5 1 because the toggle bit may stop toggling as DQ5 changes to 1. See Bit I on page 65 and DQ2: Toggle Bit II on page 66 10.7 ...

Page 67

Reading Toggle Bits DQ6/DQ2 Refer to Figure 10.4 on page 66 toggle bit status, it must read DQ7DQ0 at least twice in a row to determine whether a toggle bit is toggling. Typically, the system would note and store ...

Page 68

DQ1: Write-to-Buffer Abort DQ1 indicates whether a Write-to-Buffer operation was aborted. Under these conditions DQ1 produces a 1. The system must issue the Write-to-Buffer-Abort-Reset command sequence to return the device to reading array data. See Write Buffer on page ...

Page 69

Absolute Maximum Ratings Description Storage Temperature, Plastic Packages Ambient Temperature with Power Applied Voltage with Respect to Ground Output Short Circuit Current Notes 1. Minimum DC voltage on input or I/Os is 0.5 V. During voltage transitions, inputs or ...

Page 70

DC Characteristics 13.1 CMOS Compatible Parameter Symbol Parameter Description (Notes) I Input Load Current LI I A9, ACC Input Load Current LIT I Reset Leakage Current LR I Output Leakage Current Initial Read Current (Notes 2, ...

Page 71

Test Conditions Note Diodes are IN3064 or equivalent. Output Load Output Load Capacitance, C (including jig capacitance) Input Rise and Fall Times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels 15. Key to Switching ...

Page 72

AC Characteristics Parameter JEDEC Std Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t t Output Enable to ...

Page 73

Parameter JEDEC Std Read Cycle Time AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV CE t Page Access Time PACC t t Output Enable to Output Delay GLQV ...

Page 74

Addresses CE# OE# WE# Outputs RESET# RY/BY A23-A2 A1-A0 Data Bus CE# OE# Note Figure shows device in word mode. Addresses are A1A-1 for byte mode Figure ...

Page 75

Parameter JEDEC Std. t RESET# Pin Low (During Embedded Algorithms) to Read Mode Ready t RESET# Pin Low (NOT During Embedded Algorithms) to Read Ready t RESET# Pulse Width RP t Reset High Time Before Read RH t RESET# Input ...

Page 76

Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t Address Hold Time WLAX AH t Address Hold Time ...

Page 77

Parameter JEDEC Std Write Cycle Time AVAV Address Setup Time AVWL AS t Address Setup Time to OE# low during toggle bit polling ASO t t Address Hold Time WLAX AH t Address Hold Time ...

Page 78

Parameter JEDEC Std AVAV AVWL AS t ASO t t WLAX AH t AHT t t DVWH WHDX DH t CEPH t OEPH t t GHWL GHWL t t ELWL CS t ...

Page 79

Addresses CE# OE# WE# Data RY/BY Notes program address program data Illustration shows device in word mode ACC May 21, 2008 S29GL-A_00_A12 D ...

Page 80

Addresses CE# OE# WE# Data RY/BY Notes sector address (for Sector Erase Valid Address for reading status data (see 2. Illustration shows device in word mode. Addresses CE OE# WE# DQ7 ...

Page 81

Addresses CE# t OEH WE# OE Valid Data DQ6 / DQ2 RY/BY# Note VA Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status read cycle, and array data read ...

Page 82

Parameter JEDEC Std t V VIDR t RESET# Setup Time for Temporary Sector Unprotect RSP Note Not 100% tested RESET CE# WE# RY/BY RESET# SA, A6, A3, ...

Page 83

Table 16.9 Alternate CE# Controlled Erase and Program Operations-S29GL064A Parameter JEDEC Std AVAV AVWL ELAX DVEH EHDX GHEL GHEL t t WLEL WS ...

Page 84

Table 16.10 Alternate CE# Controlled Erase and Program Operations-S29GL032A Parameter JEDEC Std AVAV AVWL ELAX DVEH EHDX GHEL GHEL t t WLEL WS ...

Page 85

Table 16.11 Alternate CE# Controlled Erase and Program Operations-S29GL016A Parameter JEDEC Std AVAV AVWL ELAX DVEH EHDX GHEL GHEL t t WLEL WS ...

Page 86

... POLL t GHEL t t WHWH1 CPH t BUSY PBD for program 29 for program buffer to flash 55 for erase 30 for sector erase 10 for chip erase is the data written to the device. OUT S29GL-A Data# Polling PA DQ7# D OUT S29GL-A_00_A12 May 21, 2008 ...

Page 87

Erase And Programming Performance Sector Erase Time Chip Erase Time Total Write Buffer Program Time (Notes 3, 5) Total Accelerated Effective Write Buffer Program Time (Notes 4, 5) Chip Program Time Notes 1. Typical program and erase times assume ...

Page 88

Physical Dimensions 18.1 TS04848-Pin Standard Thin Small Outline Package (TSOP) STANDARD PIN OUT (TOP VIEW 0 PARALLEL TO SEATING PLANE Package TS 048 MO-142 (B) EC Jedec MIN NOM MAX Symbol ...

Page 89

TS05656-Pin Standard Thin Small Outline Package (TSOP) STANDARD PIN OUT (TOP VIEW SEE DETAIL 0. (N/2 TIPS) B PARALLEL TO SEATING PLANE Package TS 056 Jedec MO-142 (D) EC ...

Page 90

LAA06464-Ball Fortified Ball Grid Array (BGA S29GL-A S29GL-A_00_A12 May 21, 2008 ...

Page 91

VBN04848-Ball Fine-pitch Ball Grid Array (BGA) 10x 6 mm Package Ø0.50 0.20 1.00 -0. PACKAGE VBN 048 JEDEC N/A 10. 6.00 mm NOM PACKAGE SYMBOL MIN NOM A --- --- A1 0.17 --- A2 0.62 ...

Page 92

VBK048Ball Fine-pitch Ball Grid Array (BGA) 8.15x 6.15 mm Package INDEX MARK PIN A1 CORNER PACKAGE VBK 048 JEDEC N/A 8. 6.15 mm NOM PACKAGE SYMBOL MIN NOM A --- A1 0.18 A2 0.62 ...

Page 93

VBU056Ball Fine-pitch Ball Grid Array (BGA Package 0.05 (2X) A1 CORNER 10 INDEX MARK PACKAGE JEDEC 9. 7.00 mm NOM SYMBOL MIN A --- A1 0. ...

Page 94

... Revision History Section Revision A (October 13, 2004) Global Revision A1 (December 17, 2004) Secured Silicon Sector Flash Memory Region DC Characteristics (CMOS Compatible) Revision A2 (January 28, 2005) Global Revision A3 (April 22, 2005) Global Table 7.12 Revision A4 (July 29, 2005) Global Revision A5 (January 11, 2006) Global Revision A6 (June 5, 2006) Global Revision A7 (January 22, 2007) ...

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... Please note that Spansion will not be liable to you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure ...

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