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25Q16BVSIG Datasheet

Download or read online Winbond Electronic 25Q16BVSIG 16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI pdf datasheet.



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W25Q16BV
16M-BIT
SERIAL FLASH MEMORY WITH
DUAL AND QUAD SPI
Publication Release Date: March 13, 2009
- 1 -
Preliminary - Revision B

Summary of Contents

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SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI Publication Release Date: March 13, 2009 - 1 - Preliminary - Revision B W25Q16BV ...

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GENERAL DESCRIPTION 2. FEATURES ... 5 3. PIN CONFIGURATION SOIC 150 / 208-MIL 4. PAD CONFIGURATION WSON 6X5-MM 5. PIN DESCRIPTION SOIC 150/208-MIL, AND WSON 6X5-MM 6. PIN CONFIGURATION SOIC 300-MIL 7. PIN DESCRIPTION SOIC 300-MIL 7.1 Package Types ...

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Instruction Set Table 2 (Read Instructions) 10.2.4 Instruction Set Table 3 (ID, Security Instructions) 10.2.5 Write Enable (06h) 10.2.6 Write Disable (04h) 10.2.7 Read Status Register-1 (05h) and Read Status Register-2 (35h) 10.2.8 Write Status Register (01h) 10.2.9 Read ...

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Input Timing ... 57 11.10 Hold Timing ... 57 12. PACKAGE SPECIFICATION 12.1 8-Pin SOIC 150-mil (Package Code SN) 12.2 8-Pin SOIC 208-mil (Package Code SS) 12.3 8-Contact 6x5mm WSON (Package Code ZP) 12.4 16-Pin SOIC 300-mil (Package Code ...

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... Lock-Down and OTP protection 64-Bit Unique ID for each device Space Efficient Packaging 8-pin SOIC 150/208-mil 8-pad WSON 6x5-mm 16-pin SOIC 300-mil Contact Winbond for KGD and CSP options - 5 - W25Q16BV (1) Publication Release Date: March 13, 2009 Preliminary - Revision B ...

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PIN CONFIGURATION SOIC 150 / 208-MIL Figure 1a. W25Q16BV Pin Assignments, 8-pin SOIC 150 / 208-mil (Package Code SN & SS) 4. PAD CONFIGURATION WSON 6X5-MM Figure 1b. W25Q16BV Pad Assignments, 8-pad WSON 6x5-mm(Package Code ZP) 5. PIN DESCRIPTION ...

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PIN CONFIGURATION SOIC 300-MIL Figure 1c. W25Q16BV Pin Assignments, 16-pin SOIC 300-mil (Package Code SF) 7. PIN DESCRIPTION SOIC 300-MIL PAD NO. PAD NAME 1 /HOLD (IO3) 2 VCC 3 N/C 4 N/C 5 N/C 6 N/C 7 /CS ...

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Package Types W25Q16BV is offered in an 8-pin plastic 150-mil or 208-mil width SOIC (package code SN & SS) and 6x5-mm WSON (package code ZP) as shown in figure 1a, and 1b, respectively. The W25Q16BV is also offered in ...

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BLOCK DIAGRAM Block Segmentation Block Segmentation xxFF00h xxFF00h Sector 15 (4KB) Sector 15 (4KB) xxF000h xxF000h xxEF00h xxEF00h Sector 14 (4KB) Sector 14 (4KB) xxE000h xxE000h xxDF00h xxDF00h Sector 13 (4KB) Sector 13 ...

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FUNCTIONAL DESCRIPTION 9.1 SPI OPERATIONS 9.1.1 Standard SPI Instructions The W25Q16BV is accessed through an SPI compatible bus consisting of four signals: Serial Clock (CLK), Chip Select (/CS), Serial Data Input (DI) and Serial Data Output (DO). Standard SPI ...

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WRITE PROTECTION Applications that use non-volatile memory must take into consideration the possibility of noise and other adverse system conditions that may compromise data integrity. To address this concern the W25Q16BV provides several means to protect data from inadvertent ...

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CONTROL AND STATUS REGISTERS The Read Status Register-1 and Status Register-2 instructions can be used to provide status on the availability of the Flash memory array, if the device is write enabled or disabled, the state of write protection, ...

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Status Register Protect (SRP1, SRP0) The Status Register Protect bits (SRP1 and SRP0) are non-volatile read/write bits in the status register (S8 and S7). The SRP bits control the method of write protection: software protection, hardware protection, power supply ...

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SRP0 SRP0 STATUS REGISTER PROTECT 0 STATUS REGISTER PROTECT 0 (non-volatile) (non-volatile) SECTOR PROTECT SECTOR PROTECT (non-volatile) (non-volatile) TOP/BOTTOM PROTECT TOP/BOTTOM PROTECT (non-volatile) (non-volatile) BLOCK PROTECT BITS BLOCK PROTECT BITS (non-volatile) (non-volatile) WRITE ENABLE LATCH WRITE ENABLE LATCH ERASE/WRITE IN ...

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Status Register Memory Protection (1) STATUS REGISTER SEC TB BP2 BP1 BP0 ...

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... Additionally, while the memory is being programmed or erased, or when the Status Register is being written, all instructions except for Read Status Register will be ignored until the program or erase cycle has completed. 10.2.1 Manufacturer and Device Identification MANUFACTURER ID Winbond Serial Flash Device ID Instruction W25Q16BV (M7-M0) ...

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Instruction Set Table 1 (Erase, Program Instructions) BYTE 1 INSTRUCTION NAME (CODE) Write Enable 06h Write Disable 04h Read Status Register-1 05h Read Status Register-2 35h Write Status Register 01h Page Program 02h Quad Page Program 32h Sector Erase ...

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Instruction Set Table 2 (Read Instructions) BYTE 1 INSTRUCTION NAME (CODE) Read Data 03h Fast Read 0Bh Fast Read Dual Output 3Bh Fast Read Dual I/O BBh Fast Read Quad Output 6Bh Fast Read Quad I/O EBh (7) Word ...

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Instruction Set Table 3 (ID, Security Instructions) INSTRUCTION BYTE 1 NAME (CODE) Release Power down / ABh Device ID Manufacturer/ 90h (2) Device ID Manufacturer/Device ID 92h by Dual I/O Manufacture/Device ID 94h A23-A0, M[7:0] by Quad I/O JEDEC ...

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Write Enable (06h) The Write Enable instruction (Figure 4) sets the Write Enable Latch (WEL) bit in the Status Register The WEL bit must be set prior to every Page Program, Sector Erase, Block Erase, Chip ...

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Read Status Register-1 (05h) and Read Status Register-2 (35h) The Read Status Register instructions allow the 8-bit Status Registers to be read. The instruction is entered by driving /CS low and shifting the instruction code 05h for Status Register-1 ...

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Write Status Register (01h) The Write Status Register instruction allows the Status Register to be written. A Write Enable instruction must previously have been executed for the device to accept the Write Status Register Instruction (Status Register bit WEL ...

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Read Data (03h) The Read Data instruction allows one more data bytes to be sequentially read from the memory. The instruction is initiated by driving the /CS pin low and then shifting the instruction code 03h followed by a ...

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Fast Read (0Bh) The Fast Read instruction is similar to the Read Data instruction except that it can operate at the highest possible frequency of F (see AC Electrical Characteristics). This is accomplished by adding eight R dummy clocks ...

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Fast Read Dual Output (3Bh) The Fast Read Dual Output (3Bh) instruction is similar to the standard Fast Read (0Bh) instruction except that data is output on two pins; IO twice the rate of standard SPI devices. The Fast ...

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Fast Read Quad Output (6Bh) The Fast Read Quad Output (6Bh) instruction is similar to the Fast Read Dual Output (3Bh) instruction except that data is output on four pins executed before the device will accept the ...

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Fast Read Dual I/O (BBh) The Fast Read Dual I/O (BBh) instruction allows for improved random access while maintaining two IO pins, IO and similar to the Fast Read Dual Output (3Bh) instruction but with ...

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Figure 12b. Fast Read Dual I/O Instruction Sequence Diagram (M7-0 Axh W25Q16BV ...

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Fast Read Quad I/O (EBh) The Fast Read Quad I/O (EBh) instruction is similar to the Fast Read Dual I/O (BBh) instruction except that address and data bits are input and output through four pins IO clocks are required ...

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Figure 13b. Fast Read Quad I/O Instruction Sequence Diagram (M7-0 Axh W25Q16BV ...

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Word Read Quad I/O (E7h) The Word Read Quad I/O (E7h) instruction is similar to the Fast Read Quad I/O (EBh) instruction except that the lowest Address bit (A0) must equal 0 and only two Dummy clocks are required ...

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Figure 14b. Word Read Quad I/O Instruction Sequence Diagram (M7-0 Axh W25Q16BV ...

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Octal Word Read Quad I/O (E3h) The Octal Word Read Quad I/O (E3h) instruction is similar to the Fast Read Quad I/O (EBh) instruction except that the lower four Address bits (A0, A1, A2, A3) must equal 0. As ...

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Figure 15b. Octal Word Read Quad I/O Instruction Sequence Diagram (M7-0 Axh ...

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Page Program (02h) The Page Program instruction allows from one byte to 256 bytes (a page) of data to be programmed at previously erased (FFh) memory locations. A Write Enable instruction must be executed before the device will accept ...

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Quad Input Page Program (32h) The Quad Page Program instruction allows up to 256 bytes of data to be programmed at previously erased (FFh) memory locations using four pins: IO improve performance for PROM Programmer and applications that have ...

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Sector Erase (20h) The Sector Erase instruction sets all memory within a specified sector (4K-bytes) to the erased state of all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Sector Erase Instruction ...

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Block Erase (52h) The Block Erase instruction sets all memory within a specified block (32K-bytes) to the erased state of all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Block Erase ...

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Block Erase (D8h) The Block Erase instruction sets all memory within a specified block (64K-bytes) to the erased state of all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Block Erase ...

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Chip Erase (C7h / 60h) The Chip Erase instruction sets all memory within the device to the erased state of all 1s (FFh). A Write Enable instruction must be executed before the device will accept the Chip Erase Instruction ...

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Erase Suspend (75h) The Erase Suspend instruction 75h, allows the system to interrupt a sector or block erase operation and then read from or program data to, any other sector or block. The Write Status Register instruction (01h) and ...

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Power-down (B9h) Although the standby current during normal operation is relatively low, standby current can be further reduced with the Power-down instruction. The lower power consumption makes the Power-down instruction especially useful for battery powered applications (See ICC1 and ...

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Release Power-down / Device ID (ABh) The Release from Power-down / Device ID instruction is a multi-purpose instruction. It can be used to release the device from the power-down state, or obtain the devices electronic identification (ID) number. To ...

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Figure 25b. Release Power-down / Device ID Instruction Sequence Diagram - 44 - W25Q16BV ...

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... The instruction is initiated by driving the /CS pin low and shifting the instruction code 90h followed by a 24-bit address (A23-A0) of 000000h. After which, the Manufacturer ID for Winbond (EFh) and the Device ID are shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure 26 ...

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... Address bits two bits per clock. After which, the Manufacturer ID for Winbond (EFh) and the Device ID are shifted out 2 bits per clock on the falling edge of CLK with most significant bits (MSB) first as shown in figure 27. The Device ID values for the W25Q16BV is listed in Manufacturer and Device Identification table ...

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... Address bits four bits per clock. After which, the Manufacturer ID for Winbond (EFh) and the Device ID are shifted out four bits per clock on the falling edge of CLK with most significant bit (MSB) first as shown in figure 28 ...

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Read Unique ID Number (4Bh) The Read Unique ID Number instruction accesses a factory-set read-only 64-bit number that is unique to each W25Q16BV device. The ID number can be used in conjunction with user software methods to help prevent ...

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... The instruction is initiated by driving the /CS pin low and shifting the instruction code 9Fh. The JEDEC assigned Manufacturer ID byte for Winbond (EFh) and two Device ID bytes, Memory Type (ID15-ID8) and Capacity (ID7-ID0) are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure 30 ...

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Continuous Read Mode Reset (FFh or FFFFh) For Fast Read Dual/Quad I/O operations, Continuous Read Mode Bits (M7-0) are implemented to further reduce instruction overhead. By setting the (M7-0) to Ax hex, the next Fast Read Dual/Quad I/O operation ...

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ELECTRICAL CHARACTERISTICS 11.1 Absolute Maximum Ratings PARAMETERS Supply Voltage Voltage Applied to Any Pin Transient Voltage on any Pin Storage Temperature Lead Temperature Electrostatic Discharge Voltage Notes: 1. Specification for W25Q16BV is preliminary. See preliminary designation at the end ...

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Power-up Timing and Write Inhibit Threshold PARAMETER VCC (min) to /CS Low Time Delay Before Write Instruction Write Inhibit Threshold Voltage Note: 1. These parameters are characterized only. SYMBOL MIN t (1) VSL t (1) PUW V (1) WI ...

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DC Electrical Characteristics PARAMETER SYMBOL IN (1) Input Capacitance C (1) Output Capacitance Cout Input Leakage I LI I/O Leakage I LO Standby Current Power-down Current Current Read Data / ...

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AC Measurement Conditions PARAMETER Load Capacitance Input Rise and Fall Times Input Pulse Voltages Input Timing Reference Voltages Output Timing Reference Voltages Note: 1. Output Hi-Z is defined as the point where data out is no longer driven. SYMBOL ...

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AC Electrical Characteristics DESCRIPTION Clock frequency for all instructions, except Read Data (03h) & Octal Word Read (E3h) 2.7V-3.6V VCC & Industrial Temperature Clock frequency for all instructions, except Read Data (03h) & Octal Word Read (E3h) 3.0V-3.6V VCC ...

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AC Electrical Characteristics ( DESCRIPTION /HOLD Active Setup Time relative to CLK /HOLD Active Hold Time relative to CLK /HOLD Not Active Setup Time relative to CLK /HOLD Not Active Hold Time relative to CLK /HOLD to Output Low-Z ...

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Serial Output Timing 11.9 Input Timing 11.10 Hold Timing Publication Release Date: March 13, 2009 - 57 - W25Q16BV Preliminary - Revision B ...

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PACKAGE SPECIFICATION 12.1 8-Pin SOIC 150-mil (Package Code SN) SYMBOL MIN A 1.47 A1 0.10 A2 --- b 0.33 C 0.19 D (3) 4.80 E 5.80 (3) E1 3.80 e (2) L 0.40  --- Notes: ...

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SOIC 208-mil (Package Code SS) SYMBOL y Notes: 1. Controlling dimensions: inches, unless otherwise specified. 2. BSC Basic lead spacing between centers. 3. Dimensions D and ...

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WSON (Package Code ZP) SYMBOL ( ( MILLIMETERS MIN TYP. MAX 0.70 0.75 0.80 0.0276 0.00 0.02 0.05 0.0000 0.55 0.19 .0.20 0.25 0.0075 ...

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... Q R Notes: 1. Advanced Packaging Information; please contact Winbond for the latest minimum and maximum specifications. 2. BSC Basic lead spacing between centers. 3. Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. 4. The metal pad area on the bottom center of the package is connected to the device ground (GND pin). Avoid placement of exposed PCB vias under the pad ...

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SOIC 300-mil (Package Code SF) SYMBOL ( ( y Notes: 1. Controlling dimensions: inches, unless otherwise specified. 2. BSC Basic lead spacing between centers. 3. Dimensions ...

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... ORDERING INFORMATION W Winbond 25Q SpiFlash Serial Flash Memory with 4KB sectors, Dual/Quad I/O 16B 16M-bit V 2. 8-pin SOIC 150-mil SS 8-pin SOIC 208-mil I Industrial (-40°C to 85°C) ( Green Package (Lead-free, RoHS Compliant, Halogen-free (TBBA), Antimony-Oxide-free Green Package with Status Register Power Lock-Down & OTP enabled ...

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... SOIC-8 208mil SF 16M-bit SOIC-16 300mil (1) ZP 16M-bit WSON-8 6x5mm Note: 1. WSON package type ZP is not used in the top side marking. PRODUCT NUMBER W25Q16BVSNIG W25Q16BVSNIP W25Q16BVSSIG W25Q16BVSSIP W25Q16BVSFIG W25Q16BVSFIP W25Q16BVZPIG W25Q16BVZPIP - 64 - W25Q16BV TOP SIDE MARKING 25Q16BVNIG 25Q16BVNIP 25Q16BVSIG 25Q16BVSIP 25Q16BVFIG 25Q16BVFIP 25Q16BVIG 25Q16BVIP ...

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... Winbond customers using or selling these products for use in such applications their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales ...

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