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BF998 Datasheet

Download or read online Siemens Semiconductor BF998 Silicon N Channel MOSFET Tetrode (Short-channel transistor with high S/C quality factor For low-noise, gain-controlled input stages up to 1 GHz) pdf datasheet.
Also see for BF998: Datasheet #2 (9 pages)  •  Datasheet #3 (9 pages)



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Silicon N Channel MOSFET Tetrode
Features
Short-channel transistor
with high S/C quality factor
For low-noise, gain-controlled
input stages up to 1 GHz
Type
Marking
BF 998
MO
Maximum Ratings
Parameter
Drain-source voltage
Drain current
Gate 1/gate 2 peak source current
Total power dissipation, T
S
Storage temperature range
Channel temperature
Thermal Resistance
Junction - soldering point
1)
For detailed information see chapter Package Outlines.
Semiconductor Group
Ordering Code
(tape and reel)
Q62702-F1129
Symbol
V
DS
I
D
I
G1/2SM
< 76 ˚C
P
tot
T
stg
T
ch
R
th JS
1
Pin Configuration
Package
1
2
3
4
S
D
G
G
SOT-143
2
1
Values
Unit
12
V
30
mA
10
200
mW
– 55 … + 150 ˚C
150
< 370
K/W
BF 998
1)
04.96

Summary of Contents

Page 1

Silicon N Channel MOSFET Tetrode Features Short-channel transistor with high S/C quality factor For low-noise, gain-controlled input stages GHz Type Marking BF 998 MO Maximum Ratings Parameter Drain-source voltage Drain current Gate 1/gate 2 peak source current ...

Page 2

Electrical Characteristics C, unless otherwise specified. A Parameter DC Characteristics Drain-source breakdown voltage – – G1S G2S Gate 1-source breakdown voltage 10 mA ...

Page 3

Electrical Characteristics C, unless otherwise specified. A Parameter AC Characteristics Forward transconductance mA G2S kHz Gate 1 input capacitance ...

Page 4

Total power dissipation P Gate 1 forward transconductance fs1 G1S mA kHz V DS DSS Semiconductor Group Output characteristics I tot A ...

Page 5

Gate 1 forward transconductance fs1 mA kHz V DS DSS Gate 2 input capacitance G1S DS ...

Page 6

Drain current G1S Noise figure G2S mA G1S DSS f 200 MHz ...

Page 7

Noise figure G2S mA G1S DSS f 800 MHz (see test circuit 2) Gate 1 forward transfer admittance ...

Page 8

Test circuit 1 for power gain and noise figure f 200 MHz mS Test circuit 2 for power gain and noise figure f 800 MHz 3.3 mS Semiconductor Group ...

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