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ADC0801 Datasheet - Page 30

Download or read online National Semiconductor ADC0801 8-Bit Microprocessor Compatible A/D Converters pdf datasheet.
Also see for ADC0801: Datasheet #2 (41 pages)



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3D00
3E90
MVI 90
3D02
D3E7
Out Control Port
3D04
2601
MVI H 01
3D06
7C
MOV A H
3D07
D3E6
OUT C
3D09
0680
MVI B 80
3D0B
3E7F
MVI A 7F
3D0D
4F
MOV C A
3D0E
D3E5
OUT B
3D10
31AA3D
LXI SP 3DAA
3D13
D3E4
OUT A
3D15
FB
IE
3D16
00
NOP
3D17
C3163D
JMP Loop
3D1A
7A
MOV A D
3D1B
C600
ADI 00
3D1D
CA2D3D
JZ Set C
3D20
78
MOV A B
3D21
F600
ORI 00
3D23
1F
RAR
3D24
FE00
CPI 00
3D26
CA373D
JZ Done
3D29
47
MOV B A
3D2A
C3333D
JMP New C
3D2D
79
MOV A C
3D2E
B0
ORA B
3D2F
4F
MOV C A
3D30
C3203D
JMP Shift B
3D33
A9
XRA C
3D34
C30D3D
JMP Return
3D37
47
MOV B A
3D38
7C
MOV A H
3D39
EE03
XRI 03
3D3B
D3E6
OUT C
3D3D
Program for processing
proper data values
3C3D
DBE4
IN A
3C3F
EEFF
XRI FF
3C41
57
MOV D A
3C42
78
MOV A B
3C43
E6FF
ANI FF
3C45
C21A3D
JNZ Auto-Zero
3C48
C33D3D
JMP Normal
Note All numerical values are hexadecimal representations
FIGURE 20 Software for Auto-Zeroed Differential A D
5 3 Multiple A D Converters in a Z-80 Interrupt Driven
Mode (Continued)
The following notes apply
1) It is assumed that the CPU automatically performs a RST
7 instruction when a valid interrupt is acknowledged (CPU
is in interrupt mode 1) Hence the subroutine starting ad-
dress of X0038
2) The address bus from the Z-80 and the data bus to the Z-
80 are assumed to be inverted by bus drivers
3) A D data and identifying words will be stored in sequen-
tial memory locations starting at the arbitrarily chosen ad-
dress X 3E00
4) The stack pointer must be dimensioned in the main pro-
gram as the RST 7 instruction automatically pushes the
PC onto the stack and the subroutine uses an additional
6 stack addresses
Program PPI
Auto-Zero Subroutine
Close SW1 open SW2
Initialize SAR bit pointer
Initialize SAR code
Return
Port B
SAR code
Start
Dimension stack pointer
Start A D
Loop
Loop until INT asserted
Auto-Zero
Test A D output data for zero
Shift B
Clear carry
Shift ‘1‘ in B right one place
Is B zero If yes last
approximation has been made
Set C
Set bit in C that is in same
position as ‘1‘ in B
New C
Clear bit in C that is in
same position as ‘1‘ in B
Done
then output new SAR code
Open SW1 close SW2 then
proceed with program Preamp
is now zeroed
Normal
Read A D Subroutine
Read A D data
Invert data
Is B Reg
0 If not stay
in auto zero subroutine
5) The peripherals of concern are mapped into I O space
with the following port assignments
HEX PORT ADDRESS
00
MM74C374 8-bit flip-flop
01
A D 1
02
A D 2
03
A D 3
04
A D 4
05
A D 5
06
A D 6
07
A D 7
This port address also serves as the A D identifying word in
the program
30
PERIPHERAL

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