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ADC0801 Datasheet - Page 19

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Functional Description
A single point analog ground that is separate from the logic
ground points should be used The power supply bypass
capacitor and the self-clocking capacitor (if used) should
both be returned to digital ground Any V
pacitors analog input filter capacitors or input signal shield-
ing should be returned to the analog ground point A test for
proper grounding is to measure the zero error of the A D
converter Zero errors in excess of
LSB can usually be
traced to improper board layout and wiring (see section
2 5 1 for measuring the zero error)
There are many degrees of complexity associated with test-
ing an A D converter One of the simplest tests is to apply a
known analog input voltage to the converter and use LEDs
to display the resulting digital output code as shown in Fig-
ure 7
For ease of testing the V
2 (pin 9) should be supplied
with 2 560 V
and a V
supply voltage of 5 12 V
should be used This provides an LSB value of 20 mV
If a full-scale adjustment is to be made an analog input
voltage of 5 090 V
(5 120–1
LSB) should be applied to
the V
) pin with the V
) pin grounded The value of
the V
2 input voltage should then be adjusted until the
digital output code is just changing from 1111 1110 to 1111
1111 This value of V
2 should then be used for all the
The digital output LED display can be decoded by dividing
the 8 bits into 2 hex characters the 4 most significant (MS)
and the 4 least significant (LS) Table I shows the fractional
binary equivalent of these two 4-bit groups By adding the
voltages obtained from the ‘‘VMS’’ and ‘‘VLS’’ columns in
Table I the nominal value of the digital display (when
FIGURE 7 Basic A D Tester
2 560V) can be determined For example for an
output LED display of 1011 0110 or B6 (in hex) the voltage
values from the table are 3 520
2 bypass ca-
These voltage values represent the center-values of a per-
fect A D converter The effects of quantization error have to
be accounted for in the interpretation of the test results
For a higher speed test system or to obtain plotted data a
digital-to-analog converter is needed for the test set-up An
accurate 10-bit DAC can serve as the precision voltage
source for the A D Errors of the A D under test can be
expressed as either analog voltages or differences in 2 digi-
tal words
A basic A D tester that uses a DAC and provides the error
as an analog output voltage is shown in Figure 8 The 2 op
amps can be eliminated if a lab DVM with a numerical sub-
traction feature is available to read the difference voltage
‘‘A– C’’ directly The analog input voltage can be supplied
by a low frequency ramp generator and an X-Y plotter can
be used to provide analog error (Y axis) versus analog input
(X axis)
For operation with a microprocessor or a computer-based
test system it is more convenient to present the errors digi-
tally This can be done with the circuit of Figure 9 where the
output code transitions can be detected as the 10-bit DAC is
incremented This provides
under test If the results of this test are automatically plotted
with the analog input on the X axis and the error (in LSB’s)
as the Y axis a useful transfer function of the A D under
test results For acceptance testing the plot is not neces-
sary and the testing speed can be increased by establishing
internal limits on the allowed error for each code
To dicuss the interface with 8080A and 6800 microproces-
sors a common sample subroutine structure is used The
microprocessor starts the A D reads and stores the results
of 16 successive conversions then returns to the user’s
program The 16 data bytes are stored in 16 successive
memory locations All Data and Addresses will be given in
hexadecimal form Software and hardware details are pro-
vided separately for each type of microprocessor
4 1 Interfacing 8080 Microprocessor Derivatives (8048
This converter has been designed to directly interface with
derivatives of the 8080 microprocessor The A D can be
mapped into memory space (using standard memory ad-
dress decoding for CS and the MEMR and MEMW strobes)
or it can be controlled as an I O device by using the I O R
and I O W strobes and decoding the address bits A0
A7 (or address bits A8
same 8-bit address information) to obtain the CS input Us-
ing the I O space provides 256 additional addresses and
may allow a simpler 8-bit address decoder but the data can
only be input to the accumulator To make use of the addi-
tional memory reference instructions the A D should be
mapped into memory space An example of an A D in I O
space is shown in Figure 10
TL H 5671 – 18
0 120 or 3 640 V
LSB steps for the 8-bit A D
A15 as they will contain the

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