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ADC0801 Datasheet

Download or read online National Semiconductor ADC0801 8-Bit Microprocessor Compatible A/D Converters pdf datasheet.
Also see for ADC0801: Datasheet #2 (41 pages)



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ADC0801 ADC0802 ADC0803 ADC0804 ADC0805
8-Bit P Compatible A D Converters
General Description
The ADC0801
ADC0802
ADC0803
ADC0805 are CMOS 8-bit successive approximation A D
converters that use a differential potentiometric ladder
similar to the 256R products These converters are de-
signed to allow operation with the NSC800 and INS8080A
derivative control bus with TRI-STATE
rectly driving the data bus These A Ds appear like memory
locations or I O ports to the microprocessor and no inter-
facing logic is needed
Differential analog voltage inputs allow increasing the com-
mon-mode rejection and offsetting the analog zero input
voltage value In addition the voltage reference input can
be adjusted to allow encoding any smaller analog voltage
span to the full 8 bits of resolution
Features
Compatible with 8080
P derivatives no interfacing
Y
logic needed - access time - 135 ns
Easy interface to all microprocessors
Y
‘‘stand alone’’
Typical Applications
8080 Interface
TL H 5671– 31
TRI-STATE is a registered trademark of National Semiconductor Corp
Z-80 is a registered trademark of Zilog Corp
C 1995 National Semiconductor Corporation
TL H 5671
Differential analog voltage inputs
ADC0804 and
Y
Logic inputs and outputs meet both MOS and TTL volt-
Y
age level specifications
Works with 2 5V (LM336) voltage reference
Y
On-chip clock generator
Y
output latches di-
0V to 5V analog input voltage range with single 5V
Y
supply
No zero adjust required
Y
0 3 standard width 20-pin DIP package
Y
20-pin molded chip carrier or small outline package
Y
Operates ratiometrically or with 5 V
Y
log span adjusted voltage reference
Key Specifications
Resolution
Y
Total error
Y
Conversion time
Y
or operates
Error Specification (Includes Full-Scale
Zero Error and Non-Linearity)
Full-
Part
V
2
2 500 V
e
REF
Scale
Number
(No Adjustments)
Adjusted
ADC0801
LSB
g
ADC0802
LSB
g
ADC0803
LSB
g
ADC0804
1 LSB
g
ADC0805
December 1994
2 5 V
or ana-
DC
DC
8 bits
LSB
LSB and
1 LSB
g
g
g
100 s
TL H 5671 – 1
V
2
No Connection
e
DC
REF
(No Adjustments)
1 LSB
g
RRD-B30M115 Printed in U S A

Summary of Contents

Page 1

... ADC0801 ADC0802 ADC0803 ADC0804 ADC0805 8-Bit P Compatible A D Converters General Description The ADC0801 ADC0802 ADC0803 ADC0805 are CMOS 8-bit successive approximation A D converters that use a differential potentiometric ladder similar to the 256R products These converters are de- signed to allow operation with the NSC800 and INS8080A ...

Page 2

... Vapor Phase (60 seconds) Infrared (15 seconds) Electrical Characteristics The following specifications apply for Parameter ADC0801 Total Adjusted Error (Note 8) ADC0802 Total Unadjusted Error (Note 8) ADC0803 Total Adjusted Error (Note 8) ADC0804 Total Unadjusted Error (Note 8) ADC0805 Total Unadjusted Error (Note Input Resistance (Pin 9) ...

Page 3

... IN input voltage range will therefore require a minimum supply voltage of 4 950 ground In all versions of the ADC0801 ADC0802 ADC0803 and CC In all versions of the ADC0804 except the ADC0804LCJ each resistor is typically resistor ...

Page 4

Typical Performance Characteristics Logic Input Threshold Voltage vs Supply Voltage f vs Clock Capacitor CLK Output Current vs Temperature Delay From Falling Edge Output Data Valid CLK IN Schmitt Trip Levels vs Load Capacitance vs Supply Voltage ...

Page 5

TRI-STATE Test Circuits and Waveforms Timing Diagrams (All timing is measured from the 50% voltage points) Note Read strobe must occur 8 clock periods ( ...

Page 6

Typical Applications (Continued) 6800 Interface Absolute with a 2 500V Reference For low power see also LM385-2 5 Zero-Shift and Span Adjust Ratiometric with Full-Scale Adjust Note before using caps at V see section ...

Page 7

Typical Applications (Continued) Directly Converting a Low-Level Signal 1 mV Resolution with P Controlled Range V 2 128 mV e REF 1 LSB 256 mV) DAC DAC A P Interfaced ...

Page 8

Typical Applications (Continued) Self-Clocking Multiple A Ds Use a large R value to reduce loading at CLK R output Self-Clocking in Free-Running Mode After power-up a momentary grounding of the WR input is needed to guarantee operation Operating with Automotive ...

Page 9

Typical Applications (Continued) P Compatible Differential-Input Comparator with Pre-Set V See Figure 5 to select R value DB7 1 for Omit circuitry within the dotted area if hysteresis is ...

Page 10

Typical Applications (Continued) Handling 5V Analog Inputs g Beckman Instruments 694-3-R10K resistor array P Interfaced Comparator with Hysteresis Analog Self-Test for a System Read-Only Interface TL H 567133 Protecting the Input Diodes are 1N914 A Low-Cost 3-Decade Logarithmic Converter TL ...

Page 11

Typical Applications (Continued) Noise Filtering the Analog Input Uses Chebyshev implementation for steeper roll-off unity-gain 2nd order low-pass filter Adding a separate filter for each channel increases system response time if an analog multiplexer is ...

Page 12

... Note 2 Consider the amplitude errors which are introduced within the passband of the filter Power Savings and V Use ADC0801 for lowest power consumption Note Logic inputs can be driven to V Buffer prevents data bus from overdriving output when in shutdown mode ...

Page 13

... LSB from the ideal center-values Each tread (the range of analog input voltage that provides the same digital output code) is therefore 1 LSB wide Figure 1b shows a worst case error plot for the ADC0801 All center-valued inputs are guaranteed to produce the cor- rect output codes and the adjacent risers are guaranteed to ...

Page 14

... Functional Description (Continued FUNCTIONAL DESCRIPTION The ADC0801 series contains a circuit equivalent of the 256R network Analog switches are sequenced by succes- sive approximation logic to match the analog difference in- put voltage corresponding tap the R network The most significant bit is tested first and ...

Page 15

Functional Description (Continued) After the 1 is clocked through the 8-bit shift register (which completes the SAR search) it appears as the input to the D-type latch LATCH 1 As soon as this 1 is output from the shift register ...

Page 16

Functional Description (Continued) The voltage on this capacitance is switched and will result in currents entering the input pin and leaving the input which will depend on the analog differential b IN ...

Page 17

Functional Description (Continued) Add draw ground a) Analog Input Signal Example FIGURE 5 Adapting the A D Analog Input Voltages to Match an Arbitrary Input Signal Range Reference Accuracy Requirements The ...

Page 18

Functional Description (Continued Adjusting for an Arbitrary Analog Input Voltage Range If the analog zero voltage of the shifted away from ground (for example to accommodate an analog input sig- nal that does not ...

Page 19

Functional Description (Continued) A single point analog ground that is separate from the logic ground points should be used The power supply bypass capacitor and the self-clocking capacitor (if used) should both be returned to digital ground Any V REF ...

Page 20

Functional Description (Continued) FIGURE Tester with Analog Error Output TABLE I DECODING THE DIGITAL OUTPUT LEDs FRACTIONAL BINARY VALUE FOR HEX BINARY MS GROUP ...

Page 21

... Pin numbers for the DP8228 system controller others are INS8080A Note 2 Pin 23 of the INS8228 must be tied to instruction when an interrupt is acknowledged as required by the accompanying sample program FIGURE 10 ADC0801 INS8080A CPU Interface SAMPLE PROGRAM FOR FIGURE 10 ADC0801 INS8080A CPU INTERFACE 0038 RST 7 ...

Page 22

... A7) can be directly used as CS inputs one for each I O device INS8048 Interface The INS8048 interface technique with the ADC0801 series (see Figure simpler than the 8080A CPU interface There are lines and three test input lines in the 8048 ...

Page 23

... The following subroutine performs essentially the same function as in the case of the 8080A interface and it can be called from anywhere in the users program In Figure 15 the ADC0801 series is interfaced to the M6800 microprocessor through (the arbitrarily chosen) Port B of the MC6820 or MC6821 Peripheral Interface Adapter (PIA) ...

Page 24

... Functional Description (Continued) SAMPLE PROGRAM FOR FIGURE 14 ADC0801-MC6800 CPU INTERFACE 0010 DF 36 DATAIN 0012 0015 0018 001B 0E 001C 3E CONVRT 001D DE 34 001F 0022 27 14 0024 0027 08 0028 DF 34 002A 20 F0 002C DE 34 INTRPT 002E 0031 ...

Page 25

... PIAORB PIACRB The following schematic and sample subroutine (DATA IN) may be used to interface (up to) 8 ADC0801s directly to the MC6800 CPU This scheme can easily be extended to allow the interface of more converters In this configuration the converters are (arbitrarily) located at HEX address 5000 in the MC6800 memory space To save components the ...

Page 26

Functional Description (Continued) Note 1 Numbers in parentheses refer to MC6800 CPU pin out Note 2 Numbers of letters in brackets refer to standard M6800 system common bus code FIGURE 16 Interfacing Multiple MC6800 System SAMPLE ...

Page 27

... The INS8080A uses the ports of an INS8255 Pro- gramable Peripheral Interface (PPI) to control the auto zero- ing and input data from the ADC0801 as shown in Figure 18 The PPI is programmed for basic I O operation (mode 0) with Port A being an input port and Ports B and C being ...

Page 28

Functional Description (Continued) Note Note 2 Switches are LMC13334 CMOS analog switches Note 3 The 9 resistors used in the auto-zero section can be FIGURE 17 Gain of 100 Differential Transducer Preamp FIGURE 18 ...

Page 29

... A flow chart for the zeroing subroutine is shown in Figure 19 It must be noted that the ADC0801 series will output an all zero code when it converts a negative input Also a logic inversion exists as all of the I O ports a IN are buffered with inverting gates Basically if the data read is zero the differential output volt- ...

Page 30

MVI 90 3D02 D3E7 Out Control Port 3D04 2601 MVI H 01 3D06 7C MOV A H 3D07 D3E6 OUT C 3D09 0680 MVI B 80 3D0B 3E7F MVI A 7F 3D0D 4F MOV C A 3D0E D3E5 ...

Page 31

FIGURE 21 Multiple A Ds with Z-80 Type Microprocessor INTERRUPT SERVICING SUBROUTINE SOURCE LOC OBJ CODE STATEMENT 0038 E5 PUSH HL 0039 C5 PUSH BC 003A F5 PUSH AF 003B (HL) X3E00 003E ...

Page 32

... ADC0801LJ ADC0802LCJ ADC0802LJ ADC0803LCJ ADC0802LJ 883 ADC0804LCJ J20A Cavity DIP J20A Cavity DIP Molded Chip Carrier (PCC) Package TL H 567130 See Ordering Information ADC0801LCN ADC0802LCN ADC0803LCN ADC0805LCN N20A Molded DIP 125 C a ADC080X TL H 5671 32 ...

Page 34

... Physical Dimensions inches (millimeters) Order Number ADC0801LJ ADC0802LJ ADC0801LCJ ADC0802LCJ ADC0803LCJ or ADC0804LCJ ADC0802LJ 883 or 5962-9096601MRA Order Number ADC0802LCWM ADC0803LCWM or ADC0804LCWM Dual-In-Line Package (J) NS Package Number J20A SO Package (M) NS Package Number M20B 34 ...

Page 35

... Physical Dimensions inches (millimeters) (Continued) Order Number ADC0801LCN ADC0802LCN ADC0803LCN ADC0804LCN or ADC0805LCN Molded Dual-In-Line Package (N) NS Package Number N20A 35 ...

Page 36

... Hong Kong Ltd 49) 0-180-530 85 86 13th Floor Straight Block a Ocean Centre 5 Canton Rd 49) 0-180-530 85 85 Tsimshatsui Kowloon a Tel ( 49) 0-180-532 78 32 Hong Kong a 49) 0-180-532 93 58 Tel (852) 2737-1600 a Tel ( 49) 0-180-534 16 80 Fax (852) 2736-9960 a National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 ...

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