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51W17800 Datasheet - Page 12

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HM51W17800 Series
12. Either t
or t
must be satisfied for a read cycles.
RCH
RRH
13. t
(max) and t
(max) define the time at which the outputs achieve the open circuit condition and
OFF
OEZ
are not referred to output voltage levels.
14. t
, t
, t
, t
WCS
RWD
CWD
AWD
sheet as electrical characteristics only; if t
data out pin will remain open circuit (high impedance) throughout the entire cycle; if t
(min), t
t
(min), and t
CWD
CWD
(min), the cycle is a read-modify-write and the data output will contain data read from the selected
cell; if neither of the above sets of conditions is satisfied, the condition of the data out (at access
time) is indeterminate.
15. These parameters are referred to CAS leading edge in early write cycles and to WE leading edge
in delayed write or read-modify-write cycles.
defines RAS pulse width in Fast page mode cycles.
16. t
RASP
17. Access time is determined by the longest among t
18. In delayed write or read-modify-write cycles, OE must disable output buffer prior to applying data to
the device.
19. Please do not use t
state from normal operation mode to self refresh mode. If t
should use t
instaed of t
RPS
20. If you use RAS only refresh or CBR burst refresh mode in normal read/write cycles, 2048 cycles of
distributed CBR refresh with 15.6 s interval should be executed within 32 ms immediately after
exiting from and before entering into the self refresh mode.
21. If you use distributed CBR refresh mode with 15.6 s interval in normal read/write cycle, CBR
refresh should be executed within 15.6 s immediately after exiting from and before entering into
self refresh mode.
22. Repetitive self refresh mode without refreshing all memory is not allowed. Once you exit from self
refresh mode, all memory cells need to be refreshed before re-entering the self refresh mode
again.
23. XXX: H or L (H: V
IH
///////: Invalid Dout
When the address, clock and input pins are not described on timing waveforms, their pins must be
applied V
or V
.
IH
IL
12
and t
are not restrictive operating parameters. They are included in the data
CPW
t
WCS
WCS
t
(min), or t
AWD
AWD
CWD
timing, 10 s
t
100 s. During this period, the device is in transition
RASS
RASS
.
RP
(min)
V
V
(max), L: V
(min)
IN
IH
IL
(min), the cycle is an early write cycle and the
t
(min), t
t
(min) and t
CWD
AWD
AWD
, t
and t
.
AA
CAC
CPA
100 s, then RAS precharge time
RASS
V
V
(max))
IN
IL
t
RWD
RWD
t
CPW
CPW

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