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CD74HCT564M96 Datasheet

Download or read online TI (Texas Instruments) CD74HCT564M96 HCT SERIES, 8-BIT DRIVER, INVERTED OUTPUT, PDSO20 pdf datasheet.



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Data sheet acquired from Harris Semiconductor
SCHS188A
January 1998 - Revised May 2000
Features
• Buffered Inputs
• Common Three-State Output-Enable Control
• Three-State Outputs
• Bus Line Driving Capability
• Typical Propagation Delay = 13ns at V
o
C
= 15pF, T
= 25
C (Clock to Output)
L
A
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
= 30%, N
IL
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), V
= 2V (Min)
IL
IH
- CMOS Input Compatibility, I
l
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
©
Copyright
2000, Texas Instruments Incorporated
CD54/74HC534, CD54/74HCT534,
CD54/74HC564, CD54/74HCT564
High Speed CMOS Logic Octal D-Type Flip-Flop,
Three-State Inverting Positive-Edge Triggered
Description
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are high speed
Octal D-Type Flip-Flops manufactured with silicon gate CMOS
technology. They possess the low power consumption of stan-
dard CMOS integrated circuits, as well as the ability to drive
15 LSTTL loads. Due to the large output drive capability and
the three-state feature, these devices are ideally suited for
interfacing with bus lines in a bus organized system. The two
= 5V,
CC
types are functionally identical and differ only in their pinout
arrangements.
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are positive
edge triggered flip-flops. Data at the D inputs, meeting the
setup and hold time requirements, are inverted and trans-
o
o
ferred to the Q outputs on the positive going transition of the
C to 125
C
CLOCK input. When a high logic level is applied to the OUT-
PUT ENABLE input, all outputs go to a high impedance state,
regardless of what signals are present at the other inputs and
the state of the storage elements.
The HCT logic family is speed, function, and pin compatible
with the standard LS logic family.
Ordering Information
= 30% of V
IH
CC
PART NUMBER
CD54HC534F3A
CD74HC534E
CD54HCT534F3A
1 A at V
, V
CD74HCT534E
OL
OH
CD54HC564F3A
CD74HC564E
CD74HC564M
CD54HCT564F3A
CD74HCT564E
CD74HCT564M
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all
electrical specifications. Please contact your local TI sales office
or customer service for ordering information.
1
TEMP. RANGE
o
(
C)
PACKAGE
-55 to 125
20 Ld CERDIP
-55 to 125
20 Ld PDIP
-55 to 125
20 Ld CERDIP
-55 to 125
20 Ld PDIP
-55 to 125
20 Ld CERDIP
-55 to 125
20 Ld PDIP
-55 to 125
20 Ld SOIC
-55 to 125
20 Ld CERDIP
-55 to 125
20 Ld PDIP
-55 to 125
20 Ld SOIC
Specifications of TI (Texas Instruments) CD74HCT564M96
Mfr Package Description:
SOIC-20
Technology:
CMOS
Package Shape:
RECTANGULAR
Package Style:
SMALL OUTLINE
Surface Mount:
Yes
Terminal Form:
GULL WING
Terminal Pitch:
1.27 mm
Terminal Position:
DUAL
Number of Functions:
1
Number of Terminals:
20
Package Body Material:
PLASTIC/EPOXY
Temperature Grade:
MILITARY
Output Characteristics:
3-ST
Operating Temperature-Max:
125 Cel
Operating Temperature-Min:
-55 Cel
Supply Voltage-Max (Vsup):
5.5 V
Supply Voltage-Min (Vsup):
4.5 V
Supply Voltage-Nom (Vsup):
5 V
Logic IC Type:
DRIVER
Number of Bits:
8
Number of Ports:
2
Output Polarity:
INVERTED
Propagation Delay (tpd):
53 ns

Summary of Contents

Page 1

Data sheet acquired from Harris Semiconductor SCHS188A January 1998 - Revised May 2000 Features Buffered Inputs Common Three-State Output-Enable Control Three-State Outputs Bus Line Driving Capability Typical Propagation Delay 13ns ...

Page 2

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 Pinouts CD54HC534, CD54HCT534 (CERDIP) CD74HC534, CD74HCT534 (PDIP) TOP VIEW ...

Page 3

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 Absolute Maximum Ratings DC Supply Voltage -0. ...

Page 4

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 DC Electrical Specifications (Continued) CONDITIONS PARAMETER SYMBOL V (V) I Quiescent Device Current GND Three- State Leakage Current or GND HCT TYPES High ...

Page 5

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 Prerequisite for Switching Specifications PARAMETER SYMBOL TYPES Maximum Clock f MAX Frequency Clock Pulse Width t W Setup Time t SU Data to Clock Hold Time t H Data to Clock HCT TYPES ...

Page 6

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 Switching Specifications C 50pF, Input t L PARAMETER SYMBOL Output Disable to Q (564 PLZ PHZ Output Enable PZL PZH Maximum Clock Frequency f MAX Output Transition ...

Page 7

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 Test Circuits and Waveforms 90% CLOCK 50% 50% 10% 10 NOTE: Outputs should be switching from 10% V accordance with device truth table. For f MAX ...

Page 8

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564 Test Circuits and Waveforms 6ns OUTPUT 90% DISABLE 50% t PLZ OUTPUT LOW TO OFF 10% t PHZ 90% OUTPUT HIGH TO OFF OUTPUTS OUTPUTS ENABLED DISABLED FIGURE 7. HC THREE-STATE PROPAGATION DELAY WAVEFORM OTHER INPUTS ...

Page 9

Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, ...

Page 10

Product Folder: CD54HC564, High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs Contact Us Buy About TI TI Worldwide my.TI PRODUCT FOLDER FEATURES DESCRIPTION PRODUCT INFO APPLICATION NOTES USER GUIDES PRODUCT SUPPORT: TRAINING ...

Page 11

Product Folder: CD54HC564, High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs CMOS Power Consumption and CPD Calculation (Rev. B) Designing With Logic (Rev. C) (SDYA009C - Updated: 06/01/1997 Evaluation of Nickel/Palladium/Gold-Finished Surface-Mount Integrated Circuits Implications ...

Page 12

Product Folder: CD54HC534, High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs Contact Us Buy About TI TI Worldwide my.TI PRODUCT FOLDER FEATURES DESCRIPTION PRODUCT INFO APPLICATION NOTES USER GUIDES PRODUCT SUPPORT: TRAINING ...

Page 13

Product Folder: CD54HC534, High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs CMOS Power Consumption and CPD Calculation (Rev. B) Designing With Logic (Rev. C) (SDYA009C - Updated: 06/01/1997 Evaluation of Nickel/Palladium/Gold-Finished Surface-Mount Integrated Circuits Implications ...

Page 14

Product Folder: CD54HCT534, High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs Contact Us Buy About TI TI Worldwide my.TI PRODUCT FOLDER FEATURES DESCRIPTION PRODUCT INFO APPLICATION NOTES USER GUIDES PRODUCT SUPPORT: TRAINING ...

Page 15

Product Folder: CD54HCT534, High Speed CMOS Logic Octal D-Type Positive-Edge Triggered Inverting Flip-Flops with 3-State Outputs CMOS Power Consumption and CPD Calculation (Rev. B) Designing With Logic (Rev. C) (SDYA009C - Updated: 06/01/1997 Evaluation of Nickel/Palladium/Gold-Finished Surface-Mount Integrated Circuits Implications ...

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