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CD74HC4046ANSR96 Datasheet

Download or read online TI (Texas Instruments) CD74HC4046ANSR96 PHASE LOCKED LOOP, PDSO16 pdf datasheet.



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Data sheet acquired from Harris Semiconductor
SCHS204B
February 1998 - Revised March 2002
Features
• Operating Frequency Range
- Up to 18MHz (Typ) at V
= 5V
CC
- Minimum Center Frequency of 12MHz at V
• Choice of Three Phase Comparators
- EXCLUSIVE-OR
- Edge-Triggered JK Flip-Flop
- Edge-Triggered RS Flip-Flop
• Excellent VCO Frequency Linearity
• VCO-Inhibit Control for ON/OFF Keying and for Low
Standby Power Consumption
• Minimal Frequency Drift
• Operating Power Supply Voltage Range
- VCO Section . . . . . . . . . . . . . . . . . . . . . . . . . . 3V to 6V
- Digital Section . . . . . . . . . . . . . . . . . . . . . . . . 2V to 6V
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: N
= 30%, N
IL
at V
= 5V
CC
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
V
= 0.8V (Max), V
= 2V (Min)
IL
IH
- CMOS Input Compatibility, I
l
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
©
Copyright
2002, Texas Instruments Incorporated
Description
The ’HC4046A and ’HCT4046A are high-speed silicon-gate
CMOS devices that are pin compatible with the CD4046B of
the “4000B” series. They are specified in compliance with
= 4.5V
CC
JEDEC standard number 7.
The ’HC4046A and ’HCT4046A are phase-locked-loop cir-
cuits that contain a linear voltage-controlled oscillator (VCO)
and three different phase comparators (PC1, PC2 and PC3).
A signal input and a comparator input are common to each
comparator.
The signal input can be directly coupled to large voltage sig-
nals, or indirectly coupled (with a series capacitor) to small
voltage signals. A self-bias input circuit keeps small voltage
signals within the linear region of the input amplifiers. With a
passive low-pass filter, the 4046A forms a second-order loop
PLL. The excellent VCO linearity is achieved by the use of lin-
ear op-amp techniques.
Ordering Information
PART NUMBER
CD54HC4046AF
o
o
C to 125
C
CD54HC4046AF3A
CD74HC4046AE
CD74HC4046AM
CD74HC4046ANSR
CD54HCT4046AF3A
CD74HCT4046AE
= 30% of V
CD74HCT4046AM
IH
CC
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all
electrical specifications. Please contact your local TI sales office
or customer service for ordering information.
1 A at V
, V
OL
OH
Applications
• FM Modulation and Demodulation
• Frequency Synthesis and Multiplication
• Frequency Discrimination
• Tone Decoding
• Data Synchronization and Conditioning
• Voltage-to-Frequency Conversion
• Motor-Speed Control
1
CD54/74HC4046A,
CD54/74HCT4046A
High-Speed CMOS Logic
Phase-Locked-Loop with VCO
TEMP. RANGE
o
(
C)
PACKAGE
-55 to 125
16 Ld CERDIP
-55 to 125
16 Ld CERDIP
-55 to 125
16 Ld PDIP
-55 to 125
16 Ld SOIC
-55 to 125
16 Ld SOP
-55 to 125
16 Ld CERDIP
-55 to 125
16 Ld PDIP
-55 to 125
16 Ld SOIC
Specifications of TI (Texas Instruments) CD74HC4046ANSR96
Mfr Package Description:
SOP-16
Technology:
CMOS
Package Shape:
RECTANGULAR
Package Style:
SMALL OUTLINE
Surface Mount:
Yes
Terminal Form:
GULL WING
Terminal Pitch:
1.27 mm
Terminal Position:
DUAL
Number of Functions:
1
Number of Terminals:
16
Package Body Material:
PLASTIC/EPOXY
Temperature Grade:
MILITARY
Analog IC - Other Type:
PHASE LOCKED LOOP
Operating Temperature-Max:
125 Cel
Operating Temperature-Min:
-55 Cel
Supply Voltage-Max (Vsup):
6 V
Supply Voltage-Min (Vsup):
2 V
Supply Voltage-Nom (Vsup):
3 V

Summary of Contents

Page 1

Data sheet acquired from Harris Semiconductor SCHS204B February 1998 - Revised March 2002 Features Operating Frequency Range - Up to 18MHz (Typ Minimum Center Frequency of 12MHz at V Choice of Three ...

Page 2

CD54/74HC4046A, CD54/74HCT4046A CD54/74HC4046A, CD54/74HCT4046A Pinout Functional Diagram Pin Descriptions PIN NUMBER SYMBOL 1 PCP OUT 2 PC1 OUT 3 COMP IN 4 VCO OUT 5 INH GND 9 VCO IN 10 DEM OUT ...

Page 3

CD54/74HC4046A, CD54/74HCT4046A CD54/74HC4046A, CD54/74HCT4046A REF VCO DEM OUT - R5 INH 5 General Description VCO The VCO requires one external capacitor C1 (between ...

Page 4

CD54/74HC4046A, CD54/74HCT4046A CD54/74HC4046A, CD54/74HCT4046A The frequency capture range ( defined as the fre- C quency range of input signals on which the PLL will lock if it was initially out-of-lock. The frequency lock range (2f defined as the ...

Page 5

CD54/74HC4046A, CD54/74HCT4046A point the voltage on C2 remains constant as the PC2 output is in three-state and the VCO input at pin high imped- ance. Also in this condition, the signal at the phase compara- tor pulse ...

Page 6

CD54/74HC4046A, CD54/74HCT4046A CD54/74HC4046A, CD54/74HCT4046A Absolute Maximum Ratings DC Supply Voltage -0. ...

Page 7

CD54/74HC4046A, CD54/74HCT4046A DC Electrical Specifications (Continued) CONDITIONS PARAMETER SYMBOL V (V) I INH VCO Input Leakage Current GND R1 Range (Note Range (Note Capacitance - - Range ...

Page 8

CD54/74HC4046A, CD54/74HCT4046A DC Electrical Specifications (Continued) CONDITIONS PARAMETER SYMBOL V (V) I Offset Voltage VCO OFF DEM 2 Values Taken Over R See Figure 24 Dynamic Output ...

Page 9

CD54/74HC4046A, CD54/74HCT4046A DC Electrical Specifications (Continued) CONDITIONS PARAMETER SYMBOL V (V) I SIG , COMP Coupled Low-Level Input Voltage PCP , PCn OUT OUT OH IL High-Level Output Voltage CMOS ...

Page 10

CD54/74HC4046A, CD54/74HCT4046A HCT Input Loading Table INPUT INH NOTE: Unit load is I limit specifi Electrical Specifications CC o Table, e.g., 360 A max Switching Specifications C 50pF, Input t L PARAMETER SYMBOL HC ...

Page 11

CD54/74HC4046A, CD54/74HCT4046A Switching Specifications C 50pF, Input t L PARAMETER SYMBOL Center Frequency Frequency Linearity f VCO Offset Frequency DEMODULATOR SECTION OUT S IN HCT TYPES PHASE COMPARATOR SECTION Propagation Delay t t PHL, PLH SIG ...

Page 12

CD54/74HC4046A, CD54/74HCT4046A Switching Specifications C 50pF, Input t L PARAMETER SYMBOL Frequency Linearity f VCO Offset Frequency DEMODULATOR SECTION OUT S IN Test Circuits and Waveforms SIG COMP INPUTS t PHL PCP ...

Page 13

CD54/74HC4046A, CD54/74HCT4046A Typical Performance Curves VCO 0 4. CAPACITANCE, C1 (pF) ...

Page 14

CD54/74HC4046A, CD54/74HCT4046A Typical Performance Curves VCO (V) IN FIGURE 18. HC4046A TYPICAL ...

Page 15

CD54/74HC4046A, CD54/74HCT4046A Typical Performance Curves VCO 0 50pF 4. OPEN -12 -75 -50 - AMBIENT TEMPERATURE, T FIGURE ...

Page 16

CD54/74HC4046A, CD54/74HCT4046A Typical Performance Curves VCO 0 4. CAPACITANCE, C1 (pF) ...

Page 17

CD54/74HC4046A, CD54/74HCT4046A Typical Performance Curves 0.5V OVER THE V f FOR VCO LINEARITY 0 f’ LINEARITY V V MIN 1/2V MAX CC V VCOIN FIGURE 34. ...

Page 18

CD54/74HC4046A, CD54/74HCT4046A Typical Performance Curves 4 10 VCO 0 OPEN 10K RS (OHMS) FIGURE 40. HCT4046A DEMODULATOR POWER DISSIPATION vs ...

Page 19

CD54/74HC4046A, CD54/74HCT4046A HC/HCT4046A C PD CHIP SECTION HC Comparator 1 48 Comparators 2 and 3 39 VCO 61 Application Information This information is a guide for the approximation of values of external components to be used with the HC4046A and ...

Page 20

CD54/74HC4046A, CD54/74HCT4046A PHASE SUBJECT COMPARATOR PLL Conditions with PC1 No Signal at the PC2 SIG Input IN PC3 PLL Frequency PC1, PC2 or PC3 Capture Range PLL Locks on PC1 or PC3 Harmonics at Center PC2 Frequency Noise Rejection at ...

Page 22

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the ...

Page 23

TI CD54HC4046A, High Speed CMOS Logic Phase-Locked-Loop with VCO > Semiconductors > Digital Logic > Specialty Logic > Digital Phase-Locked-Loops (PLLs) CD54HC4046A, High Speed CMOS Logic Phase-Locked-Loop with VCO DEVICE STATUS: ACTIVE PRICING/AVAILABILITY/PKG DATASHEET cd54hc4046a.pdf (123 kb) ORDERABLE Rev.C DEVICE ...

Page 24

TI CD54HCT4046A, High Speed CMOS Logic Phase-Locked-Loop with VCO > Semiconductors > Digital Logic > Specialty Logic > Digital Phase-Locked-Loops (PLLs) CD54HCT4046A, High Speed CMOS Logic Phase-Locked-Loop with VCO DEVICE STATUS: ACTIVE PRICING/AVAILABILITY/PKG DATASHEET cd54hct4046a.pdf (123 kb) ORDERABLE Rev.C DEVICE ...

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