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PIC16F87XATI/SP Datasheet - Page 99

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2
9.4.8
I
C MASTER MODE START
CONDITION TIMING
To initiate a Start condition, the user sets the Start con-
dition enable bit, SEN (SSPCON2<0>). If the SDA and
SCL pins are sampled high, the Baud Rate Generator
is reloaded with the contents of SSPADD<6:0> and
starts its count. If SCL and SDA are both sampled high
when the Baud Rate Generator times out (T
SDA pin is driven low. The action of the SDA being
driven low, while SCL is high, is the Start condition and
causes the S bit (SSPSTAT<3>) to be set. Following
this, the Baud Rate Generator is reloaded with the con-
tents of SSPADD<6:0> and resumes its count. When
the Baud Rate Generator times out (T
BRG
(SSPCON2<0>) will be automatically cleared by hard-
ware, the Baud Rate Generator is suspended, leaving
the SDA line held low and the Start condition is
complete.
Note:
If at the beginning of the Start condition,
the SDA and SCL pins are already sam-
pled low, or if during the Start condition, the
SCL line is sampled low before the SDA
line is driven low, a bus collision occurs,
the Bus Collision Interrupt Flag (BCLIF) is
set, the Start condition is aborted and the
2
I
C module is reset into its Idle state.
FIGURE 9-19:
FIRST START BIT TIMING
Write to SEN bit occurs here
SDA
SCL
 2001-2013 Microchip Technology Inc.
9.4.8.1
WCOL Status Flag
If the user writes the SSPBUF when a Start sequence
is in progress, the WCOL is set and the contents of the
buffer are unchanged (the write doesn’t occur).
Note:
Because queueing of events is not
allowed, writing to the lower 5 bits of
SSPCON2 is disabled until the Start
), the
BRG
condition is complete.
), the SEN bit
Set S bit (SSPSTAT<3>)
SDA = 1,
At completion of Start bit,
SCL = 1
hardware clears SEN bit
and sets SSPIF bit
T
T
BRG
BRG
Write to SSPBUF occurs here
1st Bit
T
T
BRG
S
PIC16F87XA
2nd Bit
BRG
DS39582C-page 99

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