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PIC16F87XATI/SP Datasheet - Page 79

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9.3.8
SLEEP OPERATION
In Master mode, all module clocks are halted and the
transmission/reception will remain in that state until the
device wakes from Sleep. After the device returns to
normal mode, the module will continue to transmit/
receive data.
In Slave mode, the SPI Transmit/Receive Shift register
operates asynchronously to the device. This allows the
device to be placed in Sleep mode and data to be
shifted into the SPI Transmit/Receive Shift register.
When all 8 bits have been received, the MSSP interrupt
flag bit will be set and if enabled, will wake the device
from Sleep.
9.3.9
EFFECTS OF A RESET
A Reset disables the MSSP module and terminates the
current transfer.
TABLE 9-2:
REGISTERS ASSOCIATED WITH SPI OPERATION
Name
Bit 7
Bit 6
Bit 5
INTCON
GIE/
PEIE/
TMR0IE INT0IE
GIEH
GIEL
(1)
PIR1
PSPIF
ADIF
RCIF
(1)
PIE1
PSPIE
ADIE
RCIE
TRISC
PORTC Data Direction Register
SSPBUF
Synchronous Serial Port Receive Buffer/Transmit Register
SSPCON
WCOL
SSPOV SSPEN
TRISA
PORTA Data Direction Register
SSPSTAT
SMP
CKE
D/A
Legend: x = unknown, u = unchanged, - = unimplemented, read as ‘0’.
Shaded cells are not used by the MSSP in SPI mode.
Note 1:
The PSPIF, PSPIE and PSPIP bits are reserved on 28-pin devices; always maintain these bits clear.
 2001-2013 Microchip Technology Inc.
9.3.10
BUS MODE COMPATIBILITY
Table 9-1 shows the compatibility between the
standard SPI modes and the states of the CKP and
CKE control bits.
TABLE 9-1:
SPI BUS MODES
Standard SPI Mode
Terminology
0, 0
0, 1
1, 0
1, 1
There is also a SMP bit which controls when the data is
sampled.
Bit 4
Bit 3
Bit 2
Bit 1
RBIE
TMR0IF
INT0IF
TXIF
SSPIF
CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000
TXIE
SSPIE
CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
CKP
SSPM3
SSPM2
SSPM1 SSPM0 0000 0000 0000 0000
P
S
R/W
UA
PIC16F87XA
Control Bits State
CKP
CKE
0
1
0
0
1
1
1
0
Value on
Value on
Bit 0
all other
POR, BOR
Resets
RBIF
0000 000x 0000 000u
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
--11 1111 --11 1111
BF
0000 0000 0000 0000
DS39582C-page 79

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