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PIC16F87XATI/SP Datasheet - Page 133

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11.5
A/D Operation During Sleep
The A/D module can operate during Sleep mode. This
requires that the A/D clock source be set to RC
(ADCS1:ADCS0 = 11). When the RC clock source is
selected, the A/D module waits one instruction cycle
before starting the conversion. This allows the SLEEP
instruction to be executed which eliminates all digital
switching noise from the conversion. When the conver-
sion is completed, the GO/DONE bit will be cleared and
the result loaded into the ADRES register. If the A/D
interrupt is enabled, the device will wake-up from
Sleep. If the A/D interrupt is not enabled, the A/D mod-
ule will then be turned off, although the ADON bit will
remain set.
When the A/D clock source is another clock option (not
RC), a SLEEP instruction will cause the present conver-
sion to be aborted and the A/D module to be turned off,
though the ADON bit will remain set.
Turning off the A/D places the A/D module in its lowest
current consumption state.
TABLE 11-2:
REGISTERS/BITS ASSOCIATED WITH A/D
Address
Name
Bit 7
Bit 6
0Bh,8Bh,
INTCON
GIE
PEIE
10Bh,18Bh
(1)
0Ch
PIR1
PSPIF
ADIF
(1)
8Ch
PIE1
PSPIE
ADIE
1Eh
ADRESH A/D Result Register High Byte
9Eh
ADRESL A/D Result Register Low Byte
1Fh
ADCON0
ADCS1 ADCS0
9Fh
ADCON1
ADFM
ADCS2
85h
TRISA
PORTA Data Direction Register
05h
PORTA
PORTA Data Latch when written: PORTA pins when read
(1)
89h
TRISE
IBF
OBF
(1)
09h
PORTE
Legend:
x = unknown, u = unchanged, - = unimplemented, read as ‘0’. Shaded cells are not used for A/D conversion.
Note 1:
These registers are not available on 28-pin devices.
 2001-2013 Microchip Technology Inc.
Note:
For the A/D module to operate in Sleep,
the A/D clock source must be set to RC
(ADCS1:ADCS0 = 11). To allow the con-
version to occur during Sleep, ensure the
SLEEP instruction immediately follows the
instruction that sets the GO/DONE bit.
11.6
Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the A/D module to be turned off and any
conversion is aborted. All A/D input pins are configured
as analog inputs.
The value that is in the ADRESH:ADRESL registers is
not
modified
ADRESH:ADRESL registers will contain unknown data
after a Power-on Reset.
Bit 5
Bit 4
Bit 3
Bit 2
TMR0IE
INTE
RBIE
TMR0IF
RCIF
TXIF
SSPIF
CCP1IF
RCIE
TXIE
SSPIE
CCP1IE
TMR2IE TMR1IE 0000 0000 0000 0000
CHS2
CHS1
CHS0 GO/DONE
PCFG3
PCFG2
IBOV
PSPMODE
PORTE Data Direction bits
RE2
PIC16F87XA
for
a
Power-on
Reset.
The
Value on
Value on
Bit 1
Bit 0
POR, BOR
MCLR, WDT
INTF
RBIF
0000 000x 0000 000u
TMR2IF TMR1IF 0000 0000 0000 0000
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
ADON
0000 00-0 0000 00-0
PCFG1
PCFG0 00-- 0000
00-- 0000
--11 1111 --11 1111
--0x 0000 --0u 0000
0000 -111 0000 -111
RE1
RE0
---- -xxx ---- -uuu
DS39582C-page 133

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