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DS1886_V1 Datasheet - Page 58

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A2h Table 01h, Register F9h: ALARM EN
POWER-ON VALUE
00h
READ ACCESS
PW2 or (PW1 and RWTBL1C) or (PW1 and RTBL1C)
WRITE ACCESS
PW2 or (PW1 and RWTBL1C)
MEMORY TYPE
Nonvolatile (SEE)
F9h
RSSI HI
RSSI LO
BIT 7
Layout is identical to ALARM
Register 71h) logic. The MASK bit (A2h Table 02h, Register 89h) determines whether this memory exists in A2h Table
01h or 05h. When in A2h Table 05h, this location at A2h Table 01h becomes EE.
RSSI HI:
BIT 7
0 = Disables interrupt from RSSI HI alarm.
1 = Enables interrupt from RSSI HI alarm.
RSSI LO:
BIT 6
0 = Disables interrupt from RSSI LO alarm.
1 = Enables interrupt from RSSI LO alarm.
BITS 5:3
RESERVED
IN1EN
BIT 2
0 = Disable interrupt due to IN1 input pin.
1 = Enable interrupt due to IN1 input pin.
BIT 0
RESERVED
A2h Table 01h, Register FAh–FBh: RESERVED
POWER-ON VALUE
00h
READ ACCESS
N/A
WRITE ACCESS
N/A
MEMORY TYPE
Nonvolatile (SEE)
These registers are reserved. When in A2h Table 05h, this location at A2h Table 01h becomes EE.
SFP and PON ONU Controller
with Digital LDD Interface
2
RESERVED
RESERVED
RESERVED
in Lower Memory, Register 71h. Enables alarms to create TXFINT (Lower Memory,
2
DS1886
IN1EN
RESERVED
RESERVED
BIT 0
58

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