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DS1886_V1 Datasheet - Page 27

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F8h and FDh). See
Figure 12a
latched and latched operation.
this TXFOUT behavior during power-on. Latching of the
alarms is controlled by CNFGB and CNFGC Registers
(A2h Table 02h, Register 8Ah
Register
8Bh).
The DS1886 monitors the IMODOVFL and IBIASOVFL
bits in the MAX3710 DPCSTAT register. If any of these
bits is set, the user can optionally cause TXFOUT to be
DETECTION OF
TXFOUT FAULT
TXFOUT
Figure 12a. TXFOUT Nonlatched Operation
DETECTION OF
TXFOUT FAULT
TXD OR
TXF RESET
TXFOUT
Figure 12b. TXFOUT Latched
V
CC
1
TXFOUT
2
TXFOUT
CONDITION 1: VCC LO ALARM OR WARNING FLAG ENABLED TO CREATE TXF. V
CONDITION 2: VCC LO ALARM AND WARNING FLAGS ARE NOT ENABLED.
Figure 12c. TXFOUT During Power-On
SFP and PON ONU Controller
with Digital LDD Interface
and
Figure 12b
for non-
set. A mask bit, BIASMODOVFL_FLT in
Figure 12c
describes
Register
The DS1886 has an ID hardcoded in its die. Two
and
A2h Table 02h,
registers (DEVICE ID
DEVICE VER
for this feature. Register CEh reads 84h to identify with
the device as the DS186, and Register CFh reads the
present device version.
V
POA
t
INITR2
IS ABOVE CORRESPONDING VCC LO ALARM/WARNING THRESHOLD.
CC
DS1886
8Bh, must be set to enable this functionality.
Die Identification
A2h Table 02h, Register CEh
A2h Table 02h, Register
CFh) are assigned
A2h Table 02h,
and
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