ERASING FLASH PROGRAM
While executing code, program memory can only be
erased by rows. To erase a row:
Load the PMADRH:PMADRL register pair with
any address within the row to be erased.
Clear the CFGS bit of the PMCON1 register.
Set the FREE and WREN bits of the PMCON1
Write 55h, then AAh, to PMCON2 (Flash
programming unlock sequence).
Set control bit WR of the PMCON1 register to
begin the erase operation.
After the “BSF PMCON1,WR” instruction, the processor
requires two cycles to set up the erase operation. The
user must place two NOP instructions immediately fol-
lowing the WR bit set instruction. The processor will
halt internal operations for the typical 2 ms erase time.
This is not Sleep mode as the clocks and peripherals
will continue to run. After the erase cycle, the processor
will resume operation with the third instruction after the
PMCON1 write instruction.
(GIE = 0)
Program or Configuration Memory
Select Row Address
Select Erase Operation
(FREE = 1)
Enable Write/Erase Operation
(WREN = 1)
CPU stalls while
Erase operation completes
Disable Write/Erase Operation
(WREN = 0)
(GIE = 1)
2011 Microchip Technology Inc.