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DS34T102 Datasheet - Page 318

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____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
Register Name:
RBECR1
Register Description:
Receive Bit Error Count Register 1
Register Address:
base address + 0x28
Bit #
15
14
Name
BEC15
BEC14
Default
0
0
Bit #
7
6
Name
BEC7
BEC6
Default
0
0
Bit 15-0: Bit Error Count (BEC[15:0]). See the BEC[23:0] description below.
Register Name:
RBECR2
Register Description:
Receive Bit Error Count Register 2
Register Address:
base address + 0x2C
Bit #
15
14
Name
--
--
Default
0
0
Bit #
7
6
Name
BEC23
BEC22
Default
0
0
Bit 7-0: Bit Error Count (BEC[23:16]).
Bit Error Count (BEC[23:0]). This field indicates the number of bit errors detected in the incoming data stream by
the Rx BERT since the last performance monitoring update (see BCR.PMUM and BCR.LPMU). This count stops
incrementing when it reaches a count of 0xFFFFFF. The bit error counter does not increment when an OOS
condition exists. This field and the bit count field below can be used to calculate bit error rate.
13
12
11
BEC13
BEC12
BEC11
0
0
0
5
4
3
BEC5
BEC4
BEC3
0
0
0
13
12
11
--
--
--
0
0
0
5
4
3
BEC21
BEC20
BEC19
0
0
0
10
9
8
BEC10
BEC9
BEC8
0
0
0
2
1
0
BEC2
BEC1
BEC0
0
0
0
10
9
8
--
--
--
0
0
0
2
1
0
BEC18
BEC17
BEC16
0
0
0
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