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DS34T102 Datasheet - Page 295

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____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
Register Name:
TBPBS
Register Description:
Transmit BERT Port Bit Suppress Register
Register Address:
base address + 0x62C
Bit #
7
6
Name
BPBSE8
BPBSE7
Default
0
0
Bit 7: Transmit BERT Port Bit Suppress (TBPBS[8:1]). When one of these bits is set, the corresponding bit in
the 64kbps channel is not used (suppressed) by the Tx BERT when sending the outgoing pattern. TBPBS8
corresponds to the MSb of the channel. See section 10.14.3.
Register Name:
TSYNCC
Register Description:
Transmit Synchronizer Control Register
Register Address:
base address + 0x638
Bit #
7
6
Name
PMONR
PMONC
Default
0
0
Bit 7: Performance Monitor Reset (PMONR).
0 = Performance monitor operational
1 = Performance monitor in reset
Bit 6: Performance Monitor Control (PMONC).
0 = Performance monitor control deselected
1 = Performance monitor control selected
Bit 5: Performance Monitor Enable (PMONE).
0 = Performance monitor disabled
1 = Performance monitor enabled
Bit 3: CRC-4 Enable (CRC4). E1 Mode Only.
0 = Do not search for the CRC-4 multiframe word
1 = Search for the CRC-4 multiframe word
Bit 2: Transmit Synchronizer Enable (TSEN).
0 = Transmit synchronizer disabled
1 = Transmit synchronizer enabled
Bit 1: Sync Enable (SYNCE).
0 = Auto resync enabled
1 = Auto resync disabled
Bit 0: Resynchronize (RESYNC). When this bit is toggled from low to high, a resynchronization of the transmit
side framer is initiated. Must be cleared and set again for a subsequent resync.
5
4
3
BPBSE6
BPBSE5
BPBSE4
0
0
0
5
4
3
PMONE
-
CRC4
0
0
0
2
1
0
BPBSE3
BPBSE2
BPBSE1
0
0
0
2
1
0
TSEN
SYNCE
RESYNC
0
0
0
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