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DS34T102 Datasheet - Page 157

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____________________________________________________ DS34T101, DS34T102, DS34T104, DS34T108
FMRTOPISM3 (Framer and TDM-over-Packet Internal Signal Manager 3) 0x20
Bits
Data Element Name
[31]
TDMRCLKS8
[30:28]
TDMI8
[27]
TDMRCLKS7
[26:24]
TDMI7
[23]
TDMRCLKS6
[22:20]
TDMI6
[19]
TDMRCLKS5
[18:16]
TDMI5
[15]
TDMRCLKS4
[14:12]
TDMI4
[11]
TDMRCLKS3
[10:8]
TDMI3
[7]
TDMRCLKS2
[6:4]
TDMI2
[3]
TDMRCLKS1
[2:0]
TDMI1
R/W
Default Description
R/W
0x0
TDMoP Rx Clock Select 8
See TDMRCLKS1 below.
R/W
0x7
TDMoP Interface 8
See TDMI1 below.
R/W
0x0
TDMoP Rx Clock Select 7
See TDMRCLKS1 below.
R/W
0x6
TDMoP Interface 7
See TDMI1 below.
R/W
0x0
TDMoP Rx Clock Select 6
See TDMRCLKS1 below.
R/W
0x5
TDMoP Interface 6
See TDMI1 below.
R/W
0x0
TDMoP Rx Clock Select 5
See TDMRCLKS1 below.
R/W
0x4
TDMoP Interface 5
See TDMI1 below.
R/W
0x0
TDMoP Rx Clock Select 4
See TDMRCLKS1 below.
R/W
0x3
TDMoP Interface 4
See TDMI1 below.
R/W
0x0
TDMoP Rx Clock Select 3
See TDMRCLKS1 below.
R/W
0x2
TDMoP Interface 3
See TDMI1 below.
R/W
0x0
TDMoP Rx Clock Select 2
See TDMRCLKS1 below.
R/W
0x1
TDMoP Interface 2
See TDMI1 below.
R/W
0x0
TDMoP Rx Clock Select 1
This bit is only used in internal, two-clock mode (GCR1.MODE=0,
GCR1.CLKMODE=1). When used, this bit and the TDMI1 field
below specify the clock source for the TDM1_RCLK signal going
into the TDMoP block. See
0 = TDM1_RCLK is the signal specified by TDMI1 below
1 = TDM1_RCLK is the TCLKO1 signal
R/W
0x0
TDMoP Interface 1
This field specifies which of the Rx framers is connected to the Rx
side of port 1 of the TDMoP block. The TDMIn fields in this
register and the FRMRn fields in
clock/data/sync/signaling cross-connection between the framers
and the ports of the TDMoP block. See
details.
000 = Framer 1
001 = Framer 2
010 = Framer 3
011 = Framer 4
100 = Framer 5
101 = Framer 6
110 = Framer 7
111 = Framer 8
Figure
6-2.
FMRTOPISM4
control
Figure 6-2
for more
157 of 366

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