Datasheets»Maxim Integrated»MAX5591A Datasheet

MAX5591A Datasheet

Download or read online Maxim Integrated MAX5591A Buffered, Fast Settling, Octal, 12-Bit Voltage-Output DAC with Force Sense Output pdf datasheet.



Page
1 of 33
next
19-2983; Rev 3; 1/10
Buffered, Fast-Settling, Octal, 12/10/8-Bit,
General Description
The MAX5590–MAX5595 octal, 12/10/8-bit, voltage-out-
put digital-to-analog converters (DACs) offer buffered
outputs and a 3µs maximum settling time at the 12-bit
level. The DACs operate from a +2.7V to +5.25V analog
supply and a separate +1.8V to +5.25V digital supply.
The 20MHz 3-wire serial interface is compatible with
SPI™, QSPI™, MICROWIRE™, and digital signal
processor (DSP) protocol applications. Multiple devices
can share a common serial interface in direct-access or
daisy-chained configuration. The MAX5590–MAX5595
provide two multifunction, user-programmable, digital
I/O ports. The externally selectable power-up states of
the DAC outputs are either zero scale, midscale, or full
scale. Software-selectable FAST and SLOW settling
modes decrease settling time in FAST mode, or reduce
supply current in SLOW mode.
The MAX5590/MAX5591 are 12-bit DACs, the MAX5592/
MAX5593 are 10-bit DACs, and the MAX5594/
MAX5595 are 8-bit DACs. The MAX5590/MAX5592/
MAX5594 provide unity-gain-configured output buffers,
while the MAX5591/MAX5593/MAX5595 provide force-
sense-configured output buffers. The MAX5590–
MAX5595 are specified over the extended -40°C to
+85°C temperature range, and are available in space-
saving 24-pin and 28-pin TSSOP packages.
Portable Instrumentation
Automatic Test Equipment (ATE)
Digital Offset and Gain Adjustment
Automatic Tuning
Programmable Voltage and Current Sources
Programmable Attenuators
Industrial Process Controls
Motion Control
Microprocessor (µP)-Controlled Systems
Power Amplifier Control
Fast Parallel-DAC to Serial-DAC Upgrades
Selector Guide and Pin Configurations appear at end of data
sheet.
SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim's website at www.maxim-ic.com.
Voltage-Output DACs
o Octal, 12/10/8-Bit Serial DACs in TSSOP Packages
o 3 s (max) 12-Bit Settling Time to 1/2 LSB
o Integral Nonlinearity:
1 LSB (max) MAX5590/MAX5591 A-Grade (12-Bit)
1 LSB (max) MAX5592/MAX5593 (10-Bit)
1/2 LSB (max) MAX5594/MAX5595 (8-Bit)
o Guaranteed Monotonic, ±1 LSB (max) DNL
o Two User-Programmable Digital I/O Ports
o Single +2.7V to +5.25V Analog Supply
o +1.8V to AV
o 20MHz, 3-Wire, SPI-/QSPI-/MICROWIRE-/DSP-
Compatible Serial Interface
o Glitch-Free Outputs Power Up to Zero Scale,
Midscale, or Full Scale Controlled by PU Pin
o Unity-Gain or Force-Sense-Configured Output
Buffers
Applications
PART
MAX5590AEUG+*
MAX5590BEUG+
MAX5591AEUI+*
MAX5591BEUI+
MAX5592EUG+
MAX5593EUI+
MAX5594EUG+
MAX5595EUI+
* Future product—contact factory for availability. Specifications
are preliminary.
+Denotes a lead(Pb)-free/RoHS-compliant package.
Features
Digital Supply
DD
Ordering Information
TEMP RANGE
PIN-PACKAGE
-40°C to +85°C
24 TSSOP
-40°C to +85°C
24 TSSOP
-40°C to +85°C
28 TSSOP
-40°C to +85°C
28 TSSOP
-40°C to +85°C
24 TSSOP
-40°C to +85°C
28 TSSOP
-40°C to +85°C
24 TSSOP
-40°C to +85°C
28 TSSOP
1

Summary of Contents

Page 1

... Compatible Serial Interface o Glitch-Free Outputs Power Up to Zero Scale, Midscale, or Full Scale Controlled by PU Pin o Unity-Gain or Force-Sense-Configured Output Buffers Applications PART MAX5590AEUG MAX5590BEUG MAX5591AEUI MAX5591BEUI MAX5592EUG MAX5593EUI MAX5594EUG MAX5595EUI Future productcontact factory for availability. Specifications are preliminary. Denotes a lead(Pb)-free/RoHS-compliant package. ...

Page 2

... MAX5594/MAX5595 (8-bit) Guaranteed monotonic (Note 5590A/M AX 5591A ( 12 eci m al cod 5590B/M AX 5591B ( 12 eci m al cod MAX5592/MAX5593 (10-bit), decimal code 10 MAX5594/MAX5595 (8-bit), decimal code 3 MAX5590A/MAX5591A (12-bit) MAX5590B/MAX5590B (12-bit) Full-scale output MAX5592/MAX5593 (10-bit) MAX5594/MAX5595 (8-bit) 70° ...

Page 3

Buffered, Fast-Settling, Octal, 12/10/8-Bit, ELECTRICAL CHARACTERISTICS (continued) (AV 2.7V to 5.25V 1. 4.5V to 5.25V 10kΩ 100pF (Note 1) PARAMETER SYMBOL Power-Supply Rejection ...

Page 4

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs ELECTRICAL CHARACTERISTICS (continued) (AV 2.7V to 5.25V 1. 4.5V to 5.25V 10kΩ 100pF (Note 1) PARAMETER SYMBOL ...

Page 5

Buffered, Fast-Settling, Octal, 12/10/8-Bit, ELECTRICAL CHARACTERISTICS (continued) (AV 2.7V to 5.25V 1. 4.5V to 5.25V 10kΩ 100pF (Note 1) PARAMETER SYMBOL POWER REQUIREMENTS ...

Page 6

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs TIMING CHARACTERISTICSDSP Mode Disabled (3V, 3.3V, 5V Logic) (Figure 1) (DV 2.7V to 5.25V 0V AGND DGND PARAMETER SYMBOL SCLK Frequency SCLK Pulse-Width High SCLK Pulse-Width Low CS Fall ...

Page 7

Buffered, Fast-Settling, Octal, 12/10/8-Bit, TIMING CHARACTERISTICSDSP Mode Disabled (1.8V Logic) (Figure 1) (DV 1.8V to 5.25V 0V AGND DGND PARAMETER SYMBOL SCLK Frequency SCLK Pulse-Width High SCLK Pulse-Width Low CS Fall to SCLK Rise Setup ...

Page 8

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs TIMING CHARACTERISTICSDSP Mode Enabled (3V, 3.3V, 5V Logic) (Figure 2) (DV 2.7V to 5.25V 0V AGND DGND PARAMETER SYMBOL SCLK Frequency SCLK Pulse-Width High SCLK Pulse-Width Low CS Fall ...

Page 9

Buffered, Fast-Settling, Octal, 12/10/8-Bit, TIMING CHARACTERISTICSDSP Mode Enabled (1.8V Logic) (Figure 2) (DV 1.8V to 5.25V 0V AGND DGND PARAMETER SYMBOL SCLK Frequency SCLK Pulse-Width High SCLK Pulse-Width Low CS Fall to SCLK Fall Setup ...

Page 10

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs ( 5V 4.096V REF L noted.) INTEGRAL NONLINEARITY vs. DIGITAL INPUT CODE (12-BIT B-GRADE -4 0 1024 2048 ...

Page 11

Buffered, Fast-Settling, Octal, 12/10/8-Bit 4.096V REF L noted.) DIFFERENTIAL NONLINEARITY vs. TEMPERATURE (12-BIT) 0.2 0.1 0 -0.1 B-GRADE MIDSCALE -0.2 -40 - TEMPERATURE (°C) SUPPLY CURRENT ...

Page 12

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs ( 5V 4.096V REF L noted.) MAJOR-CARRY TRANSITION GLITCH MAX5590-95 toc19 CS 5V/div OUT_ 2mV/div 250ns/div REFERENCE INPUT BANDWIDTH -10 -15 -20 V ...

Page 13

Buffered, Fast-Settling, Octal, 12/10/8-Bit, PIN MAX5590 MAX5591 NAME MAX5592 MAX5593 MAX5594 MAX5595 AGND 3 3 OUTA 4, 8, 17, 21 N. OUTB 6 7 OUTC 7 10 OUTD ...

Page 14

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs SERIAL SCLK INTERFACE CONTROL DIN DSP 16-BIT SHIFT REGISTER UPIO1 UPIO1 AND UPIO2 UPIO2 POWER-DOWN LOGIC LOGIC AND REGISTER DECODE CONTROL PU INPUT REGISTER A INPUT REGISTER H REF 14 ___ ...

Page 15

Buffered, Fast-Settling, Octal, 12/10/8-Bit SERIAL SCLK INTERFACE CONTROL DIN DSP 16-BIT SHIFT REGISTER UPIO1 UPIO1 AND UPIO2 UPIO2 POWER-DOWN LOGIC LOGIC AND REGISTER DECODE CONTROL PU INPUT REGISTER A INPUT REGISTER H REF ___ Voltage-Output DACs Functional ...

Page 16

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs Detailed Description The MAX5590MAX5595 octal, 12/10/8-bit, voltage-out- put DACs offer buffered outputs and a 3µs maximum settling time at the 12-bit level. The DACs operate from a single 2.7V to 5.25V analog supply and ...

Page 17

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Table 1. Serial Write Data Format MSB CONTROL BITS D11 D10 SCLK DIN CS t CSW DOUTDC1 DOUTDC0 OR DOUTRB UPIO1/UPIO2 CONFIGURED AS DOUTDC_ (DAISY-CHAIN DATA OUTPUT, MODE ...

Page 18

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs Serial-Interface Programming Commands Tables 2a, 2b, and 2c provide all of the serial-interface programming commands for the MAX5590MAX5595. Table 2a shows the basic DAC programming com- mands, Table 2b gives the advanced-feature program- ming ...

Page 19

Table 2a. DAC Programming Commands CONTROL BITS D11 D10 D9 D8 INPUT REGISTERS (AH) DIN D11 D10 D9 D8 DIN D11 D10 D9 D8 ...

Page 20

Table 2b. Advanced-Feature Programming Commands CONTROL BITS DATA D11 D10 SELECT BITS DIN LOADING INPUT AND DAC REGISTERS (AH) DIN D11 D10 DIN ...

Page 21

Table 2b. Advanced-Feature Programming Commands (continued) CONTROL BITS DATA D11 D10 UPIO CONFIGURATION BITS DIN DIN DOUTRB SETTLING-TIME-MODE ...

Page 22

Table 2c. 24-Bit Read Commands CONTROL BITS DATA D27 D26 D25 D24 D23 D22 D21 READ INPUT AND DAC REGISTERS AH DIN DOUTRB X X ...

Page 23

Buffered, Fast-Settling, Octal, 12/10/8-Bit, DAC Programming Examples: To load input register A from the shift register, leaving DAC register A unchanged (DAC output unchanged), use the command in Table 3. The MAX5590MAX5595 can load all of the input regis- ters ...

Page 24

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs Shutdown-Mode Bits (PD_0, PD_1) Use the shutdown-mode bits and control bits to shut down each DAC independently. The shutdown- mode bits determine the output state of the selected channels. The shutdown-control bits put the ...

Page 25

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Settling-Time-Mode Write Example: To configure DACA and DACD into FAST mode and DACB and DACC into SLOW mode, use the command in Table 13. To read back the settling-time-mode bits, use the com- mand in Table ...

Page 26

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs UPIO Bits (UPSL1, UPSL2, UP0UP3) The MAX5590MAX5595 provide two user-programma- ble input/output (UPIO) ports: UPIO1 and UPIO2. These ports have 15 possible configurations, as shown in Table 22. UPIO1 and UPIO2 can be programmed ...

Page 27

Buffered, Fast-Settling, Octal, 12/10/8-Bit, UPIO Configuration Table 22 lists the possible configurations for UPIO1 and UPIO2. UPIO1 and UPIO2 use the selected function when configured by the UP3UP0 configuration bits. LDAC controls the loading of the DAC registers. When LDAC ...

Page 28

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs t LDL LDAC TOGG PDL t CMS CLR, MID, OR SET OUT_ PDL AFFECTS DAC OUPTUTS (V ) ONLY IF DACS WERE PREVIOUSLY SHUT DOWN. OUT_ Figure 5. Asynchronous Signal Timing ...

Page 29

Buffered, Fast-Settling, Octal, 12/10/8-Bit, UPIO1 and UPIO2 can each be configured as a gener- al-purpose input (GPI), a general-purpose output low (GPOL general-purpose output high (GPOH). The GPI can serve to detect interrupts from µPs or micro- controllers. ...

Page 30

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Voltage-Output DACs Applications Information Figure 7 shows the unity-gain MAX5590 in a unipolar output configuration. Table 24 lists the unipolar out- put codes. The MAX5590 outputs can be configured for bipolar operation, as shown in Figure ...

Page 31

Buffered, Fast-Settling, Octal, 12/10/8-Bit, Power-Supply and Layout Considerations Bypass the analog and digital power supplies by using a 10µF capacitor in parallel with a 0.1µF capacitor to AGND and DGND (Figure 10). Minimize lead lengths to reduce lead inductance. Use ...

Page 32

... CS 9 SCLK 10 DIN 11 DSP 12 TSSOP Selector Guide OUTPUT PART BUFFER CO NFIGUR ATION MAX5590AEUG Unity Gain MAX5590BEUG Unity Gain MAX5591AEUI Force Sense MAX5591BEUI Force Sense MAX5592EUG Unity Gain MAX5593EUI Force Sense MAX5594EUG Unity Gain MAX5595EUI Force Sense 32 ___ AV 24 REF AGND 23 PU ...

Page 33

... Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ___ 33 © 2010 Maxim Integrated Products ...

Comments to this Datasheet