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FMS1616LAX-XXEX Datasheet - Page 3

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Features
- Functionality
- Standard SDRAM Functionality
- Programmable burst lengths : 1, 2, 4, 8, or full page
- JEDEC Compatibility
- Low Power Features
- Low voltage power supply : 1.8V
- Auto TCSR(Temperature Compensated Self Refresh)
- Partial Array Self Refresh power-saving mode
- Deep Power Down Mode
- Driver Strength Control
- Operating Temperature Ranges:
- Special (-10℃ to +60℃)
- Commercial (0℃ to +70℃)
- Extended (-25℃ to +85℃)
- Industrial (-40℃ to +85℃)
Logic Block Diagram
CKE
CLK
/CS
Control
Refresh
/WE
Logic
Counter
/CAS
/RAS
Mode
Reg
Enhanced
Mode
Reg
A0-A10
BA
Addr
Reg
Selection Guide
Voltage
Device
V
DD
FMS1616LAx-60Ex
1.7-1.95V
1.7-1.95V
FMS1616LAx-75Ex
Rev0.3, May., 2010
- LVTTL Compatible IO Interface
- 54ball FBGA with 0.8mm ball pitch
- FMS1616LAH : Lead Free & Halogen Free
- Wafer
- FMS1616LAW
Functional Description
The FMS1616LAx-xxEx family is high-performance CMOS
Dynamic RAMs (DRAM) organized as 1M x 16. These devices
feature advanced circuit design to provide ultra-low active current
and extremely low standby current.This is ideal for providing
More Battery Life in portable applications such as wireless
handsets. The device is compatible with the JEDEC standard
LP-SDRAM specifications.
banka
banka
Row
Row
Row
Add
Addr
Addr
Mux
Latch/
Latch/
Decoder
Decoder
Bank
Control
Logic
Column
Column
Decoder
Decoder
Column
Address
Latch
Access Time(t
Frequency
V
CL=2
DDQ
166MHz
8
133MHz
10
FMS1616LAx-xxEx
bank B
bank A
Memory
Array
Data
Output
2Kx4K
Reg
Sense Amp
Write Drivers
DQM Mask
READ DATA
LATCH
Data
Input
Reg
)
AC
t
RCD
CL=3
5.5
15
7
18
LDQM-
UDQM
DQ0 -
DQ15
t
RP
15
18

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