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FMS1616LAX-XXEX Datasheet - Page 11

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EXTENDED MODE REGISTER
The Extended Mode Register controls additional functions such
as Partial Array Self Refresh (PASR) and Driver Strength (DS).
The Extended Mode Register is programmed via the Mode
Register Set command (BA1=1) and retains the stored
information until it is programmed again or the device loses
power. The Extended Mode Register must be programmed with
M7 through M10 set to “0”. The Extended Mode Register must
be loaded when all banks are idle and no bursts are in progress,
and the controller must wait the specified time initiating any
subsequent operation. Violating either of these requirements
results in unspecified operation.
AUTO TEMPERATURE COMPENSATED SELF REFRESH
Every cell in the DRAM requires refreshing due to the capacitor
losing its charge over time. The refresh rate is dependent on
temperature. At higher temperatures a capacitor loses charge
quicker than at lower temperatures, requiring the cells to be
refreshed more often. In order to save power consumption,
according to the temperature, Mobile-SDRAM includes the
internal temperature sensor and control units to control the self
refresh cycle automatically.
Table 4. Extended Mode Register Definition
EM11-
EM10-
EM9-
EM8-
BA
A10
A9
A8
1
All must be set to ‘0’
Rev0.3, May., 2010
PARTIAL ARRAY SELF REFRESH
The Partial Array Self Refresh (PASR) feature allows the
controller to select the amount of memory that will be refreshed
during SELF REFRESH. The refresh options are all banks
(bank a,b); one bank (bank a). WRITE and READ commands
occur to any bank selected during standard operation, but only
the selected banks in PASR will be refreshed during SELF
REFRESH. Data in Banks that are disabled will be lost.
Driver Strength Control
The driver strength feature allows one to reduce the drive
strength of the I/O’s on the device during low frequency
operation. This allows systems to reduce the noise associated
with the I/O’s switching.
EM7-
EM6-
EM5-
EM4-
A7
A6
A5
A4
Driver Strength
FMS1616LAx-xxEx
EM3-
EM2-
EM1-
EM0-
A3
A2
A1
A0
0
PASR
.

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